Remove OverloadedStrings in favour of declaration in module

5 files changed, 1 insertions, 10 deletions

diff --git a/src/Test/VeriFuzz/CodeGen.hs b/src/Test/VeriFuzz/CodeGen.hs
index e009fb6..e06891f 100644
--- a/src/Test/VeriFuzz/CodeGen.hs
+++ b/src/Test/VeriFuzz/CodeGen.hs
@@ -11,8 +11,6 @@ This module generates the code from the Verilog AST defined in
 "Test.VeriFuzz.VerilogAST".
 -}
 
-{-# LANGUAGE OverloadedStrings #-}
-
 module Test.VeriFuzz.CodeGen where
 
 import           Control.Lens
diff --git a/src/Test/VeriFuzz/Graph/ASTGen.hs b/src/Test/VeriFuzz/Graph/ASTGen.hs
index b5fb944..f1ac88a 100644
--- a/src/Test/VeriFuzz/Graph/ASTGen.hs
+++ b/src/Test/VeriFuzz/Graph/ASTGen.hs
@@ -10,8 +10,6 @@ Portability : POSIX
 Generates the AST from the graph directly.
 -}
 
-{-# LANGUAGE OverloadedStrings #-}
-
 module Test.VeriFuzz.Graph.ASTGen where
 
 import           Data.Graph.Inductive       (LNode, Node)
diff --git a/src/Test/VeriFuzz/Graph/CodeGen.hs b/src/Test/VeriFuzz/Graph/CodeGen.hs
index 8d20a71..bfceb4c 100644
--- a/src/Test/VeriFuzz/Graph/CodeGen.hs
+++ b/src/Test/VeriFuzz/Graph/CodeGen.hs
@@ -10,8 +10,6 @@ Portability : POSIX
 Define the code generation directly from the random DAG.
 -}
 
-{-# LANGUAGE OverloadedStrings #-}
-
 module Test.VeriFuzz.Graph.CodeGen
   ( generate
   ) where
diff --git a/src/Test/VeriFuzz/Helpers.hs b/src/Test/VeriFuzz/Helpers.hs
index ca5505c..3650f8e 100644
--- a/src/Test/VeriFuzz/Helpers.hs
+++ b/src/Test/VeriFuzz/Helpers.hs
@@ -10,8 +10,6 @@ Portability : POSIX
 Defaults and common functions.
 -}
 
-{-# LANGUAGE OverloadedStrings #-}
-
 module Test.VeriFuzz.Helpers where
 
 import           Control.Lens
diff --git a/src/Test/VeriFuzz/VerilogAST.hs b/src/Test/VeriFuzz/VerilogAST.hs
index dace0eb..0497432 100644
--- a/src/Test/VeriFuzz/VerilogAST.hs
+++ b/src/Test/VeriFuzz/VerilogAST.hs
@@ -10,8 +10,7 @@ Portability : POSIX
 Defines the types to build a Verilog AST.
 -}
 
-{-# LANGUAGE OverloadedStrings #-}
-{-# LANGUAGE TemplateHaskell   #-}
+{-# LANGUAGE TemplateHaskell #-}
 
 module Test.VeriFuzz.VerilogAST where