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authorYann Herklotz <ymherklotz@gmail.com>2019-01-01 14:20:15 +0100
committerYann Herklotz <ymherklotz@gmail.com>2019-01-01 14:20:15 +0100
commitd2b9f0bf57a32e520e28d240deeec6a519275b2b (patch)
treeebc2d8745b4d0421e8864c5a6e24c1203bd8d5e6 /src
parent45b60c6cafd2949dbbd9eafdbb433e20668a0a87 (diff)
downloadverismith-d2b9f0bf57a32e520e28d240deeec6a519275b2b.tar.gz
verismith-d2b9f0bf57a32e520e28d240deeec6a519275b2b.zip
Add documentation
Diffstat (limited to 'src')
-rw-r--r--src/Test/VeriFuzz/Verilog/CodeGen.hs10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/Test/VeriFuzz/Verilog/CodeGen.hs b/src/Test/VeriFuzz/Verilog/CodeGen.hs
index 11b9743..81dfd97 100644
--- a/src/Test/VeriFuzz/Verilog/CodeGen.hs
+++ b/src/Test/VeriFuzz/Verilog/CodeGen.hs
@@ -22,12 +22,16 @@ import qualified Data.Text.IO as T
import Test.VeriFuzz.Internal.Shared
import Test.VeriFuzz.Verilog.AST
+-- | Inserts commas between '[Text]' and except the last one.
comma :: [Text] -> Text
comma = T.intercalate ", "
+-- | Show function for 'Text'
showT :: (Show a) => a -> Text
showT = T.pack . show
+-- | Map a 'Maybe Stmnt' to 'Text'. If it is 'Just stmnt', the generated
+-- statements are returned. If it is 'Nothing', then @;\n@ is returned.
defMap :: Maybe Stmnt -> Text
defMap stat = fromMaybe ";\n" $ genStmnt <$> stat
@@ -57,6 +61,8 @@ genModuleDecl mod =
noIn = null $ mod ^. modInPorts
outIn = (mod ^. modOutPorts) ++ (mod ^. modInPorts)
+-- | Conversts 'Port' to 'Text' for the module list, which means it only
+-- generates a list of identifiers.
genModPort :: Port -> Text
genModPort port = port ^. portName . getIdentifier
@@ -139,6 +145,7 @@ genBinaryOperator BinLSR = " >> "
genBinaryOperator BinASL = " <<< "
genBinaryOperator BinASR = " >>> "
+-- | Convert 'UnaryOperator' to 'Text'.
genUnaryOperator :: UnaryOperator -> Text
genUnaryOperator UnPlus = "+"
genUnaryOperator UnMinus = "-"
@@ -151,14 +158,17 @@ genUnaryOperator UnXor = "^"
genUnaryOperator UnNxor = "~^"
genUnaryOperator UnNxorInv = "^~"
+-- | Generate verilog code for an 'Event'.
genEvent :: Event -> Text
genEvent (EId id) = "@(" <> id ^. getIdentifier <> ")"
genEvent (EExpr expr) = "@(" <> genExpr expr <> ")"
genEvent EAll = "@*"
+-- | Generates verilog code for a 'Delay'.
genDelay :: Delay -> Text
genDelay (Delay i) = "#" <> showT i
+-- | Generate the verilog code for an 'LVal'.
genLVal :: LVal -> Text
genLVal (RegId id) = id ^. getIdentifier
genLVal (RegExpr id expr) =