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authorYann Herklotz <git@ymhg.org>2019-05-09 23:18:20 +0100
committerYann Herklotz <git@ymhg.org>2019-05-09 23:18:20 +0100
commit06c61e705d952679a6200e7d18d2463723fe5878 (patch)
treed7e7c5c54ef792de2f2f5dfcacdc93d161c44b77 /test
parent77702d5492ba19b6e3e0dda9e9460a8bb67a8e3f (diff)
downloadverismith-06c61e705d952679a6200e7d18d2463723fe5878.tar.gz
verismith-06c61e705d952679a6200e7d18d2463723fe5878.zip
Add parser and reducer tests
Diffstat (limited to 'test')
-rw-r--r--test/Parser.hs56
-rw-r--r--test/Reduce.hs50
2 files changed, 106 insertions, 0 deletions
diff --git a/test/Parser.hs b/test/Parser.hs
new file mode 100644
index 0000000..89ab1cc
--- /dev/null
+++ b/test/Parser.hs
@@ -0,0 +1,56 @@
+{-|
+Module : Parser
+Description : Test the parser.
+Copyright : (c) 2019, Yann Herklotz Grave
+License : GPL-3
+Maintainer : ymherklotz [at] gmail [dot] com
+Stability : experimental
+Portability : POSIX
+
+Test the parser.
+-}
+
+module Parser
+ ( parserTests
+ )
+where
+
+import Data.Either (either, isRight)
+import Hedgehog (Gen, Property, (===))
+import qualified Hedgehog as Hog
+import qualified Hedgehog.Gen as Hog
+import Test.Tasty
+import Test.Tasty.Hedgehog
+import Text.Parsec
+import VeriFuzz
+import VeriFuzz.Verilog.Lex
+import VeriFuzz.Verilog.Parser
+
+randomMod' :: Gen ModDecl
+randomMod' = Hog.resize 20 (randomMod 3 10)
+
+parserInput :: Property
+parserInput = Hog.property $ do
+ v <- Hog.forAll randomMod'
+ Hog.assert . isRight $ parse parseModDecl
+ "input_test.v"
+ (alexScanTokens $ str v)
+ where str = show . GenVerilog
+
+parserIdempotent :: Property
+parserIdempotent = Hog.property $ do
+ v <- Hog.forAll randomMod'
+ let sv = vshow v
+ p sv === (p . p) sv
+ where
+ vshow = show . GenVerilog
+ p sv =
+ either (\x -> show x <> "\n" <> sv) vshow
+ . parse parseModDecl "idempotent_test.v"
+ $ alexScanTokens sv
+
+parserTests :: TestTree
+parserTests = testGroup "Parser tests"
+ [ testProperty "Input" parserInput
+ , testProperty "Idempotence" parserIdempotent
+ ]
diff --git a/test/Reduce.hs b/test/Reduce.hs
new file mode 100644
index 0000000..4edfdc0
--- /dev/null
+++ b/test/Reduce.hs
@@ -0,0 +1,50 @@
+{-|
+Module : Reduce
+Description : Test reduction.
+Copyright : (c) 2019, Yann Herklotz Grave
+License : GPL-3
+Maintainer : ymherklotz [at] gmail [dot] com
+Stability : experimental
+Portability : POSIX
+
+Test reduction.
+-}
+
+{-# LANGUAGE QuasiQuotes #-}
+
+module Reduce
+ (reducerTests)
+where
+
+--import Data.Either (fromRight)
+--import Data.Text (unpack)
+import Test.Tasty
+---import Text.Shakespeare.Text (st)
+--import VeriFuzz
+
+reducerTests :: TestTree
+reducerTests = testGroup "Reducer tests"
+ [ moduleReducer ]
+
+moduleReducer :: TestTree
+moduleReducer = testGroup "Module reducer"
+ [ ]
+
+--reduceOneModule :: TestTree
+--reduceOneModule = undefined
+--
+---- brittany-disable-next-binding
+--moduleIn :: SourceInfo
+--moduleIn = SourceInfo "top" . fromRight (Verilog []) . parseVerilog "" $ unpack [st|
+--module m(x, y);
+--input x;
+--output y;
+--endmodule
+--
+--module top(x, y);
+--input x;
+--output y;
+--m m1(x, y)
+--endmodule
+-- |]
+--