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authorYann Herklotz <git@ymhg.org>2019-04-01 10:55:40 +0100
committerYann Herklotz <git@ymhg.org>2019-04-01 10:55:40 +0100
commitbac2f24871d95eeb3aa3fc898a7656fc4f5f094a (patch)
treeabae8302d3a07eec39fe1a3d05077d4505a0b2bb /test
parentce3b5a9dc47c2325e1e9cc61279972048b9fbabd (diff)
downloadverismith-bac2f24871d95eeb3aa3fc898a7656fc4f5f094a.tar.gz
verismith-bac2f24871d95eeb3aa3fc898a7656fc4f5f094a.zip
Run through brittany
Diffstat (limited to 'test')
-rw-r--r--test/Doctest.hs3
-rw-r--r--test/Property.hs11
2 files changed, 8 insertions, 6 deletions
diff --git a/test/Doctest.hs b/test/Doctest.hs
index 421f3d6..44fecac 100644
--- a/test/Doctest.hs
+++ b/test/Doctest.hs
@@ -8,5 +8,4 @@ main :: IO ()
main = do
traverse_ putStrLn args -- optionally print arguments
doctest args
- where
- args = flags ++ pkgs ++ module_sources
+ where args = flags ++ pkgs ++ module_sources
diff --git a/test/Property.hs b/test/Property.hs
index e44e59b..e2eff7b 100644
--- a/test/Property.hs
+++ b/test/Property.hs
@@ -45,7 +45,8 @@ simpleAltGraph = QC.testProperty "simple alternative graph generation check"
where simp = G.isSimple . getAltGraph
parserInput' :: ModDeclSub -> Bool
-parserInput' (ModDeclSub v) = isRight $ parse parseModDecl "input_test.v" (alexScanTokens str)
+parserInput' (ModDeclSub v) = isRight
+ $ parse parseModDecl "input_test.v" (alexScanTokens str)
where str = show . GenVerilog $ v
parserIdempotent' :: ModDeclSub -> QC.Property
@@ -53,9 +54,11 @@ parserIdempotent' (ModDeclSub v) = p sv === (p . p) sv
where
vshow = show . GenVerilog
sv = vshow v
- p = vshow . fromRight (error "Failed idempotent test") . parse
- parseModDecl
- "idempotent_test.v" . alexScanTokens
+ p =
+ vshow
+ . fromRight (error "Failed idempotent test")
+ . parse parseModDecl "idempotent_test.v"
+ . alexScanTokens
parserInput :: TestTree
parserInput = QC.testProperty "parser input" $ parserInput'