diff options
Diffstat (limited to 'src/Test/VeriFuzz/Verilog/CodeGen.hs')
| -rw-r--r-- | src/Test/VeriFuzz/Verilog/CodeGen.hs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/Test/VeriFuzz/Verilog/CodeGen.hs b/src/Test/VeriFuzz/Verilog/CodeGen.hs index 7861294..e3e6ecf 100644 --- a/src/Test/VeriFuzz/Verilog/CodeGen.hs +++ b/src/Test/VeriFuzz/Verilog/CodeGen.hs @@ -47,11 +47,11 @@ genModuleDecl mod = where ports | noIn && noOut = "" - | otherwise = "(" <> out <> (sep_ ", " $ genModPort <$> mod ^. modInPorts) <> ")" + | otherwise = "(" <> (sep_ ", " $ genModPort <$> outIn) <> ")" modItems = fromList $ genModuleItem <$> mod ^. moduleItems - noOut = isNothing $ mod ^. modOutPort + noOut = null $ mod ^. modOutPorts noIn = null $ mod ^. modInPorts - out = fromMaybe "" . safe head $ mod ^.. modOutPort . _Just . portName . getIdentifier + outIn = (mod ^. modOutPorts) ++ (mod ^. modInPorts) genModPort :: Port -> Text genModPort port = port ^. portName . getIdentifier |