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authorYann Herklotz <ymherklotz@gmail.com>2018-12-30 19:44:40 +0100
committerYann Herklotz <ymherklotz@gmail.com>2018-12-30 19:44:40 +0100
commitcabb2cec0bde620c49b1d7a36cd8226f579c1023 (patch)
treea3f0cfcd487f5c58179706d75f5ef70917c9a760 /src/Test/VeriFuzz/Verilog/CodeGen.hs
parent9f2bb8aff3198d36ac847dde67e4e630cd8b889f (diff)
downloadverismith-cabb2cec0bde620c49b1d7a36cd8226f579c1023.tar.gz
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[Fix #13, Fix #15] Fix type errors and add inst functions
Diffstat (limited to 'src/Test/VeriFuzz/Verilog/CodeGen.hs')
-rw-r--r--src/Test/VeriFuzz/Verilog/CodeGen.hs6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/Test/VeriFuzz/Verilog/CodeGen.hs b/src/Test/VeriFuzz/Verilog/CodeGen.hs
index 7861294..e3e6ecf 100644
--- a/src/Test/VeriFuzz/Verilog/CodeGen.hs
+++ b/src/Test/VeriFuzz/Verilog/CodeGen.hs
@@ -47,11 +47,11 @@ genModuleDecl mod =
where
ports
| noIn && noOut = ""
- | otherwise = "(" <> out <> (sep_ ", " $ genModPort <$> mod ^. modInPorts) <> ")"
+ | otherwise = "(" <> (sep_ ", " $ genModPort <$> outIn) <> ")"
modItems = fromList $ genModuleItem <$> mod ^. moduleItems
- noOut = isNothing $ mod ^. modOutPort
+ noOut = null $ mod ^. modOutPorts
noIn = null $ mod ^. modInPorts
- out = fromMaybe "" . safe head $ mod ^.. modOutPort . _Just . portName . getIdentifier
+ outIn = (mod ^. modOutPorts) ++ (mod ^. modInPorts)
genModPort :: Port -> Text
genModPort port = port ^. portName . getIdentifier