diff options
Diffstat (limited to 'src/VeriFuzz/Verilog/CodeGen.hs')
| -rw-r--r-- | src/VeriFuzz/Verilog/CodeGen.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/VeriFuzz/Verilog/CodeGen.hs b/src/VeriFuzz/Verilog/CodeGen.hs index 956472f..58b1d16 100644 --- a/src/VeriFuzz/Verilog/CodeGen.hs +++ b/src/VeriFuzz/Verilog/CodeGen.hs @@ -53,7 +53,7 @@ genDescription desc = genModuleDecl $ desc ^. getDescription -- | Generate the 'ModDecl' for a module and convert it to 'Text'. genModuleDecl :: ModDecl -> Text genModuleDecl m = - "module " <> m ^. moduleId . getIdentifier <> ports <> ";\n" <> modI <> "endmodule\n" + "module " <> m ^. modId . getIdentifier <> ports <> ";\n" <> modI <> "endmodule\n" where ports | noIn && noOut = "" | otherwise = "(" <> comma (genModPort <$> outIn) <> ")" |