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-rw-r--r--src/Verismith/Circuit.hs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/Verismith/Circuit.hs b/src/Verismith/Circuit.hs
index 9ca1de7..cda2f4f 100644
--- a/src/Verismith/Circuit.hs
+++ b/src/Verismith/Circuit.hs
@@ -34,7 +34,7 @@ import Verismith.Circuit.Random
import Verismith.Verilog.AST
import Verismith.Verilog.Mutate
-fromGraph :: Gen ModDecl
+fromGraph :: Gen (ModDecl ann)
fromGraph = do
gr <- rDupsCirc <$> Hog.resize 100 randomDAG
return