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diff --git a/content/zettel/1c4b.md b/content/zettel/1c4b.md new file mode 100644 index 0000000..2c89511 --- /dev/null +++ b/content/zettel/1c4b.md @@ -0,0 +1,15 @@ ++++ +title = "Solution in Vericert" +date = "2022-05-17" +author = "Yann Herklotz" +tags = [] +categories = [] +backlinks = ["1c4a"] +forwardlinks = ["1c4b1"] +zettelid = "1c4b" ++++ + +One possible solution to this in Vericert is to add the MAC operation as +a valid operation in the Verilog instruction. This means that one can +then have a peephole optimisation pass (maybe as part of the scheduling +pass), which will then introduce the MAC operations into the graph. |