blob: 2c8951139bbf9a7cc61107658d69d693f91496b4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
|
+++
title = "Solution in Vericert"
date = "2022-05-17"
author = "Yann Herklotz"
tags = []
categories = []
backlinks = ["1c4a"]
forwardlinks = ["1c4b1"]
zettelid = "1c4b"
+++
One possible solution to this in Vericert is to add the MAC operation as
a valid operation in the Verilog instruction. This means that one can
then have a peephole optimisation pass (maybe as part of the scheduling
pass), which will then introduce the MAC operations into the graph.
|
