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diff --git a/content/zettel/2e1f.md b/content/zettel/2e1f.md new file mode 100644 index 0000000..fe960b7 --- /dev/null +++ b/content/zettel/2e1f.md @@ -0,0 +1,24 @@ ++++ +title = "Software loop pipelining" +date = "2022-05-03" +author = "Yann Herklotz" +tags = [] +categories = [] +backlinks = ["2e1e"] +forwardlinks = ["1c6", "2e1f1"] +zettelid = "2e1f" ++++ + +Software loop pipelining is described here as opposed to hardware loop +pipelining ([\#1c6]). This is also an interesting question to think +about. Even though the answer seems quite straightforward, thinking +about the details is quite complicated. It's not clear that modulo +scheduling followed by standard scheduling will give the same result as +hardware scheduling, especially because when generating hardware +directly one has much finer control over the execution. + +In software, code is inherently sequential, and compared to hardware +where one can have a lot of data flowing through the circuit +simultaneously, in software this has to be simulated. + + [\#1c6]: /zettel/1c6 |