blob: fe960b7b80c70e9783f0f88b5de3462b35217614 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
|
+++
title = "Software loop pipelining"
date = "2022-05-03"
author = "Yann Herklotz"
tags = []
categories = []
backlinks = ["2e1e"]
forwardlinks = ["1c6", "2e1f1"]
zettelid = "2e1f"
+++
Software loop pipelining is described here as opposed to hardware loop
pipelining ([\#1c6]). This is also an interesting question to think
about. Even though the answer seems quite straightforward, thinking
about the details is quite complicated. It's not clear that modulo
scheduling followed by standard scheduling will give the same result as
hardware scheduling, especially because when generating hardware
directly one has much finer control over the execution.
In software, code is inherently sequential, and compared to hardware
where one can have a lot of data flowing through the circuit
simultaneously, in software this has to be simulated.
[\#1c6]: /zettel/1c6
|
