diff options
Diffstat (limited to 'dot_product/student_files_2015/student_files_2015/prj1/quartus_proj_DE0/db/prev_cmp_ise_proj.qmsg')
| -rw-r--r-- | dot_product/student_files_2015/student_files_2015/prj1/quartus_proj_DE0/db/prev_cmp_ise_proj.qmsg | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/dot_product/student_files_2015/student_files_2015/prj1/quartus_proj_DE0/db/prev_cmp_ise_proj.qmsg b/dot_product/student_files_2015/student_files_2015/prj1/quartus_proj_DE0/db/prev_cmp_ise_proj.qmsg deleted file mode 100644 index 3265beb..0000000 --- a/dot_product/student_files_2015/student_files_2015/prj1/quartus_proj_DE0/db/prev_cmp_ise_proj.qmsg +++ /dev/null @@ -1,43 +0,0 @@ -{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1456848117176 ""} -{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1456848117178 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Mar 01 16:01:56 2016 " "Processing started: Tue Mar 01 16:01:56 2016" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1456848117178 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1456848117178 ""} -{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off ise_proj -c ise_proj " "Command: quartus_map --read_settings_files=on --write_settings_files=off ise_proj -c ise_proj" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1456848117178 ""} -{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS_MORE_LOGICAL" "4 4 8 " "Parallel Compilation has detected 8 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 4 of the 4 physical processors detected instead." { } { } 0 11104 "Parallel Compilation has detected %3!i! hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use %1!i! of the %2!i! physical processors detected instead." 0 0 "Quartus II" 0 -1 1456848117439 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/catapult c/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v 7 7 " "Found 7 design units, including 7 entities, in source file /catapult c/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" { { "Info" "ISGN_ENTITY_NAME" "1 mgc_out_reg_pos " "Found entity 1: mgc_out_reg_pos" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117472 ""} { "Info" "ISGN_ENTITY_NAME" "2 mgc_out_reg_neg " "Found entity 2: mgc_out_reg_neg" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" 68 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117472 ""} { "Info" "ISGN_ENTITY_NAME" "3 mgc_out_reg " "Found entity 3: mgc_out_reg" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" 133 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117472 ""} { "Info" "ISGN_ENTITY_NAME" "4 mgc_out_buf_wait " "Found entity 4: mgc_out_buf_wait" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" 210 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117472 ""} { "Info" "ISGN_ENTITY_NAME" "5 mgc_out_fifo_wait " "Found entity 5: mgc_out_fifo_wait" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" 296 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117472 ""} { "Info" "ISGN_ENTITY_NAME" "6 mgc_out_fifo_wait_core " "Found entity 6: mgc_out_fifo_wait_core" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" 353 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117472 ""} { "Info" "ISGN_ENTITY_NAME" "7 mgc_pipe " "Found entity 7: mgc_pipe" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" 644 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117472 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1456848117472 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/catapult c/dot_product/dot_product/rtl_mgc_ioport (2).v 20 20 " "Found 20 design units, including 20 entities, in source file /catapult c/dot_product/dot_product/rtl_mgc_ioport (2).v" { { "Info" "ISGN_ENTITY_NAME" "1 mgc_in_wire " "Found entity 1: mgc_in_wire" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 13 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "2 mgc_in_wire_en " "Found entity 2: mgc_in_wire_en" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 29 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "3 mgc_in_wire_wait " "Found entity 3: mgc_in_wire_wait" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 49 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "4 mgc_chan_in " "Found entity 4: mgc_chan_in" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 72 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "5 mgc_out_stdreg " "Found entity 5: mgc_out_stdreg" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 109 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "6 mgc_out_stdreg_en " "Found entity 6: mgc_out_stdreg_en" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 125 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "7 mgc_out_stdreg_wait " "Found entity 7: mgc_out_stdreg_wait" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 145 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "8 mgc_out_prereg_en " "Found entity 8: mgc_out_prereg_en" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 169 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "9 mgc_inout_stdreg_en " "Found entity 9: mgc_inout_stdreg_en" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 191 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "10 hid_tribuf " "Found entity 10: hid_tribuf" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 217 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "11 mgc_inout_stdreg_wait " "Found entity 11: mgc_inout_stdreg_wait" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 229 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "12 mgc_inout_buf_wait " "Found entity 12: mgc_inout_buf_wait" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 269 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "13 mgc_inout_fifo_wait " "Found entity 13: mgc_inout_fifo_wait" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 339 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "14 mgc_io_sync " "Found entity 14: mgc_io_sync" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 419 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "15 mgc_bsync_rdy " "Found entity 15: mgc_bsync_rdy" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 428 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "16 mgc_bsync_vld " "Found entity 16: mgc_bsync_vld" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 443 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "17 mgc_bsync_rv " "Found entity 17: mgc_bsync_rv" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 458 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "18 mgc_sync " "Found entity 18: mgc_sync" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 479 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "19 funccall_inout " "Found entity 19: funccall_inout" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 498 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} { "Info" "ISGN_ENTITY_NAME" "20 modulario_en_in " "Found entity 20: modulario_en_in" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 526 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1456848117476 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/catapult c/dot_product/dot_product/rtl (2).v 2 2 " "Found 2 design units, including 2 entities, in source file /catapult c/dot_product/dot_product/rtl (2).v" { { "Info" "ISGN_ENTITY_NAME" "1 dot_product_core " "Found entity 1: dot_product_core" { } { { "../../../../dot_product/dot_product/rtl (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl (2).v" 16 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117478 ""} { "Info" "ISGN_ENTITY_NAME" "2 dot_product " "Found entity 2: dot_product" { } { { "../../../../dot_product/dot_product/rtl (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl (2).v" 119 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1456848117478 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1456848117478 ""} -{ "Error" "EVRFX_VERI_FOUND_DUPLICATE_MODULE_DEFINITION" "mgc_out_reg_pos rtl_mgc_ioport_v2001.v(3) " "Verilog HDL error at rtl_mgc_ioport_v2001.v(3): module \"mgc_out_reg_pos\" cannot be declared more than once" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001.v" 3 0 0 } } } 0 10228 "Verilog HDL error at %2!s!: module \"%1!s!\" cannot be declared more than once" 0 0 "Quartus II" 0 -1 1456848117480 ""} -{ "Info" "IVRFX_HDL_SEE_DECLARATION" "mgc_out_reg_pos rtl_mgc_ioport_v2001 (2).v(3) " "HDL info at rtl_mgc_ioport_v2001 (2).v(3): see declaration for object \"mgc_out_reg_pos\"" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001 (2).v" 3 0 0 } } } 0 10499 "HDL info at %2!s!: see declaration for object \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456848117480 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_out_reg_neg rtl_mgc_ioport_v2001.v(68) " "Ignored design unit \"mgc_out_reg_neg\" at rtl_mgc_ioport_v2001.v(68) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001.v" 68 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117481 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_out_reg rtl_mgc_ioport_v2001.v(133) " "Ignored design unit \"mgc_out_reg\" at rtl_mgc_ioport_v2001.v(133) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001.v" 133 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117481 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_out_buf_wait rtl_mgc_ioport_v2001.v(210) " "Ignored design unit \"mgc_out_buf_wait\" at rtl_mgc_ioport_v2001.v(210) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001.v" 210 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117481 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_out_fifo_wait rtl_mgc_ioport_v2001.v(296) " "Ignored design unit \"mgc_out_fifo_wait\" at rtl_mgc_ioport_v2001.v(296) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001.v" 296 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117481 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_out_fifo_wait_core rtl_mgc_ioport_v2001.v(353) " "Ignored design unit \"mgc_out_fifo_wait_core\" at rtl_mgc_ioport_v2001.v(353) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001.v" 353 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117481 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_pipe rtl_mgc_ioport_v2001.v(644) " "Ignored design unit \"mgc_pipe\" at rtl_mgc_ioport_v2001.v(644) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport_v2001.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport_v2001.v" 644 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117482 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/catapult c/dot_product/dot_product/rtl_mgc_ioport_v2001.v 0 0 " "Found 0 design units, including 0 entities, in source file /catapult c/dot_product/dot_product/rtl_mgc_ioport_v2001.v" { } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1456848117482 ""} -{ "Error" "EVRFX_VERI_FOUND_DUPLICATE_MODULE_DEFINITION" "mgc_in_wire rtl_mgc_ioport.v(13) " "Verilog HDL error at rtl_mgc_ioport.v(13): module \"mgc_in_wire\" cannot be declared more than once" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 13 0 0 } } } 0 10228 "Verilog HDL error at %2!s!: module \"%1!s!\" cannot be declared more than once" 0 0 "Quartus II" 0 -1 1456848117483 ""} -{ "Info" "IVRFX_HDL_SEE_DECLARATION" "mgc_in_wire rtl_mgc_ioport (2).v(13) " "HDL info at rtl_mgc_ioport (2).v(13): see declaration for object \"mgc_in_wire\"" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport (2).v" 13 0 0 } } } 0 10499 "HDL info at %2!s!: see declaration for object \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456848117483 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_in_wire_en rtl_mgc_ioport.v(29) " "Ignored design unit \"mgc_in_wire_en\" at rtl_mgc_ioport.v(29) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 29 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117483 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_in_wire_wait rtl_mgc_ioport.v(49) " "Ignored design unit \"mgc_in_wire_wait\" at rtl_mgc_ioport.v(49) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 49 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_chan_in rtl_mgc_ioport.v(72) " "Ignored design unit \"mgc_chan_in\" at rtl_mgc_ioport.v(72) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 72 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_out_stdreg rtl_mgc_ioport.v(109) " "Ignored design unit \"mgc_out_stdreg\" at rtl_mgc_ioport.v(109) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 109 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_out_stdreg_en rtl_mgc_ioport.v(125) " "Ignored design unit \"mgc_out_stdreg_en\" at rtl_mgc_ioport.v(125) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 125 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_out_stdreg_wait rtl_mgc_ioport.v(145) " "Ignored design unit \"mgc_out_stdreg_wait\" at rtl_mgc_ioport.v(145) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 145 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_out_prereg_en rtl_mgc_ioport.v(169) " "Ignored design unit \"mgc_out_prereg_en\" at rtl_mgc_ioport.v(169) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 169 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_inout_stdreg_en rtl_mgc_ioport.v(191) " "Ignored design unit \"mgc_inout_stdreg_en\" at rtl_mgc_ioport.v(191) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 191 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "hid_tribuf rtl_mgc_ioport.v(217) " "Ignored design unit \"hid_tribuf\" at rtl_mgc_ioport.v(217) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 217 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_inout_stdreg_wait rtl_mgc_ioport.v(229) " "Ignored design unit \"mgc_inout_stdreg_wait\" at rtl_mgc_ioport.v(229) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 229 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_inout_buf_wait rtl_mgc_ioport.v(269) " "Ignored design unit \"mgc_inout_buf_wait\" at rtl_mgc_ioport.v(269) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 269 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_inout_fifo_wait rtl_mgc_ioport.v(339) " "Ignored design unit \"mgc_inout_fifo_wait\" at rtl_mgc_ioport.v(339) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 339 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117484 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_io_sync rtl_mgc_ioport.v(419) " "Ignored design unit \"mgc_io_sync\" at rtl_mgc_ioport.v(419) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 419 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117485 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_bsync_rdy rtl_mgc_ioport.v(428) " "Ignored design unit \"mgc_bsync_rdy\" at rtl_mgc_ioport.v(428) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 428 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117485 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_bsync_vld rtl_mgc_ioport.v(443) " "Ignored design unit \"mgc_bsync_vld\" at rtl_mgc_ioport.v(443) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 443 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117485 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_bsync_rv rtl_mgc_ioport.v(458) " "Ignored design unit \"mgc_bsync_rv\" at rtl_mgc_ioport.v(458) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 458 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117485 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "mgc_sync rtl_mgc_ioport.v(479) " "Ignored design unit \"mgc_sync\" at rtl_mgc_ioport.v(479) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 479 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117485 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "funccall_inout rtl_mgc_ioport.v(498) " "Ignored design unit \"funccall_inout\" at rtl_mgc_ioport.v(498) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl_mgc_ioport.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl_mgc_ioport.v" 498 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117485 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/catapult c/dot_product/dot_product/rtl_mgc_ioport.v 0 0 " "Found 0 design units, including 0 entities, in source file /catapult c/dot_product/dot_product/rtl_mgc_ioport.v" { } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1456848117485 ""} -{ "Error" "EVRFX_VERI_FOUND_DUPLICATE_MODULE_DEFINITION" "dot_product_core rtl.v(92) " "Verilog HDL error at rtl.v(92): module \"dot_product_core\" cannot be declared more than once" { } { { "../../../../dot_product/dot_product/rtl.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl.v" 92 0 0 } } } 0 10228 "Verilog HDL error at %2!s!: module \"%1!s!\" cannot be declared more than once" 0 0 "Quartus II" 0 -1 1456848117487 ""} -{ "Info" "IVRFX_HDL_SEE_DECLARATION" "dot_product_core rtl (2).v(16) " "HDL info at rtl (2).v(16): see declaration for object \"dot_product_core\"" { } { { "../../../../dot_product/dot_product/rtl (2).v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl (2).v" 16 0 0 } } } 0 10499 "HDL info at %2!s!: see declaration for object \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456848117487 ""} -{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "dot_product rtl.v(175) " "Ignored design unit \"dot_product\" at rtl.v(175) due to previous errors" { } { { "../../../../dot_product/dot_product/rtl.v" "" { Text "C:/Catapult C/dot_product/dot_product/rtl.v" 175 0 0 } } } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1456848117487 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/catapult c/dot_product/dot_product/rtl.v 0 0 " "Found 0 design units, including 0 entities, in source file /catapult c/dot_product/dot_product/rtl.v" { } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1456848117487 ""} -{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 28 s 0 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 28 errors, 0 warnings" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "428 " "Peak virtual memory: 428 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1456848117550 ""} { "Error" "EQEXE_END_BANNER_TIME" "Tue Mar 01 16:01:57 2016 " "Processing ended: Tue Mar 01 16:01:57 2016" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1456848117550 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1456848117550 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1456848117550 ""} } { } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1456848117550 ""} -{ "Error" "EFLOW_ERROR_COUNT" "Full Compilation 30 s 0 s " "Quartus II Full Compilation was unsuccessful. 30 errors, 0 warnings" { } { } 0 293001 "Quartus II %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1456848118141 ""} |