1 files changed, 0 insertions, 54 deletions
diff --git a/dot_product/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/dffpipe_pe9.tdf b/dot_product/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/dffpipe_pe9.tdf
deleted file mode 100644
index 5bd8385..0000000
--- a/dot_product/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/dffpipe_pe9.tdf
+++ /dev/null
@@ -1,54 +0,0 @@
---dffpipe DELAY=2 WIDTH=10 clock clrn d q ALTERA_INTERNAL_OPTIONS=AUTO_SHIFT_REGISTER_RECOGNITION=OFF
---VERSION_BEGIN 13.0 cbx_mgl 2013:06:12:18:05:10:SJ cbx_stratixii 2013:06:12:18:03:43:SJ cbx_util_mgl 2013:06:12:18:03:43:SJ  VERSION_END
-
-
--- Copyright (C) 1991-2013 Altera Corporation
---  Your use of Altera Corporation's design tools, logic functions 
---  and other software and tools, and its AMPP partner logic 
---  functions, and any output files from any of the foregoing 
---  (including device programming or simulation files), and any 
---  associated documentation or information are expressly subject 
---  to the terms and conditions of the Altera Program License 
---  Subscription Agreement, Altera MegaCore Function License 
---  Agreement, or other applicable license agreement, including, 
---  without limitation, that your use is for the sole purpose of 
---  programming logic devices manufactured by Altera and sold by 
---  Altera or its authorized distributors.  Please refer to the 
---  applicable agreement for further details.
-
-
-
---synthesis_resources = reg 20 
-OPTIONS ALTERA_INTERNAL_OPTION = "AUTO_SHIFT_REGISTER_RECOGNITION=OFF";
-
-SUBDESIGN dffpipe_pe9
-( 
-	clock	:	input;
-	clrn	:	input;
-	d[9..0]	:	input;
-	q[9..0]	:	output;
-) 
-VARIABLE 
-	dffe14a[9..0] : dffe;
-	dffe15a[9..0] : dffe;
-	ena	: NODE;
-	prn	: NODE;
-	sclr	: NODE;
-
-BEGIN 
-	dffe14a[].clk = clock;
-	dffe14a[].clrn = clrn;
-	dffe14a[].d = (d[] & (! sclr));
-	dffe14a[].ena = ena;
-	dffe14a[].prn = prn;
-	dffe15a[].clk = clock;
-	dffe15a[].clrn = clrn;
-	dffe15a[].d = (dffe14a[].q & (! sclr));
-	dffe15a[].ena = ena;
-	dffe15a[].prn = prn;
-	ena = VCC;
-	prn = VCC;
-	q[] = dffe15a[].q;
-	sclr = GND;
-END;
---VALID FILE