diff options
Diffstat (limited to 'pipelined_multiply/pipelined_multiply.qsf')
| -rw-r--r-- | pipelined_multiply/pipelined_multiply.qsf | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/pipelined_multiply/pipelined_multiply.qsf b/pipelined_multiply/pipelined_multiply.qsf new file mode 100644 index 0000000..7cf4a03 --- /dev/null +++ b/pipelined_multiply/pipelined_multiply.qsf @@ -0,0 +1,54 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2013 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 64-Bit +# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition +# Date created = 16:21:18 February 19, 2016 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# pipelined_multiply_assignment_defaults.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY "Cyclone III" +set_global_assignment -name DEVICE EP3C16F484C6 +set_global_assignment -name TOP_LEVEL_ENTITY pipelined_multiply +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:21:18 FEBRUARY 19, 2016" +set_global_assignment -name LAST_QUARTUS_VERSION 13.1 +set_global_assignment -name BDF_FILE ../ten_bit_adder_NO_BUS/ten_bit_adder_NO_BUS.bdf +set_global_assignment -name BDF_FILE ../adder/full_adder.bdf +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 +set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V +set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)" +set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation +set_global_assignment -name BDF_FILE pipelined_multiply.bdf
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