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+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 1991-2013 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Altera Program License
+Subscription Agreement, Altera MegaCore Function License
+Agreement, or other applicable license agreement, including,
+without limitation, that your use is for the sole purpose of
+programming logic devices manufactured by Altera and sold by
+Altera or its authorized distributors. Please refer to the
+applicable agreement for further details.
+*/
+(header "symbol" (version "1.1"))
+(symbol
+ (rect 16 16 176 96)
+ (text "dec_to_seven_segment" (rect 5 0 102 12)(font "Arial" ))
+ (text "inst" (rect 8 64 20 76)(font "Arial" ))
+ (port
+ (pt 0 32)
+ (input)
+ (text "in[3..0]" (rect 0 0 25 12)(font "Arial" ))
+ (text "in[3..0]" (rect 21 27 46 39)(font "Arial" ))
+ (line (pt 0 32)(pt 16 32)(line_width 3))
+ )
+ (port
+ (pt 0 48)
+ (input)
+ (text "b2" (rect 0 0 9 12)(font "Arial" ))
+ (text "b2" (rect 21 43 30 55)(font "Arial" ))
+ (line (pt 0 48)(pt 16 48)(line_width 1))
+ )
+ (port
+ (pt 160 32)
+ (output)
+ (text "out[6..0]" (rect 0 0 31 12)(font "Arial" ))
+ (text "out[6..0]" (rect 108 27 139 39)(font "Arial" ))
+ (line (pt 160 32)(pt 144 32)(line_width 3))
+ )
+ (drawing
+ (rectangle (rect 16 16 144 64)(line_width 1))
+ )
+)