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// Copyright (C) 1991-2013 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EP4CGX15BF14C6 Package FBGA169
// 

//
// This file contains Fast Corner delays for the design using part EP4CGX15BF14C6,
// with speed grade M, core voltage 1.2V, and temperature 0 Celsius
//

// 
// This SDF file should be used for ModelSim-Altera (VHDL) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "full_adder")
  (DATE "02/17/2016 22:15:19")
  (VENDOR "Altera")
  (PROGRAM "Quartus II 64-Bit")
  (VERSION "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "cycloneiv_io_obuf")
    (INSTANCE \\SUM\~output\\)
    (DELAY
      (ABSOLUTE
        (PORT i (450:450:450) (482:482:482))
        (IOPATH i o (1600:1600:1600) (1589:1589:1589))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneiv_io_obuf")
    (INSTANCE \\Cout\~output\\)
    (DELAY
      (ABSOLUTE
        (PORT i (826:826:826) (900:900:900))
        (IOPATH i o (1545:1545:1545) (1518:1518:1518))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneiv_io_ibuf")
    (INSTANCE \\X\~input\\)
    (DELAY
      (ABSOLUTE
        (IOPATH i o (262:262:262) (637:637:637))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneiv_io_ibuf")
    (INSTANCE \\Cin\~input\\)
    (DELAY
      (ABSOLUTE
        (IOPATH i o (262:262:262) (637:637:637))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneiv_io_ibuf")
    (INSTANCE \\Y\~input\\)
    (DELAY
      (ABSOLUTE
        (IOPATH i o (252:252:252) (627:627:627))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneiv_lcell_comb")
    (INSTANCE \\inst2\~0\\)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1805:1805:1805) (1994:1994:1994))
        (PORT datac (2054:2054:2054) (2300:2300:2300))
        (PORT datad (1780:1780:1780) (1954:1954:1954))
        (IOPATH dataa combout (195:195:195) (203:203:203))
        (IOPATH datac combout (120:120:120) (125:125:125))
        (IOPATH datad combout (68:68:68) (63:63:63))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneiv_lcell_comb")
    (INSTANCE \\inst3\~0\\)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1810:1810:1810) (1999:1999:1999))
        (PORT datac (2049:2049:2049) (2295:2295:2295))
        (PORT datad (1784:1784:1784) (1959:1959:1959))
        (IOPATH dataa combout (170:170:170) (163:163:163))
        (IOPATH datac combout (119:119:119) (124:124:124))
        (IOPATH datad combout (68:68:68) (63:63:63))
      )
    )
  )
)