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{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS_MORE_LOGICAL" "4 4 8 " "Parallel Compilation has detected 8 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 4 of the 4 physical processors detected instead." { } { } 0 11104 "Parallel Compilation has detected %3!i! hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use %1!i! of the %2!i! physical processors detected instead." 0 0 "Fitter" 0 -1 1456854066082 ""}
{ "Info" "IMPP_MPP_USER_DEVICE" "DE0_D5M EP3C16F484C6 " "Selected device EP3C16F484C6 for design \"DE0_D5M\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1456854066347 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1456854066420 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1456854066420 ""}
{ "Info" "ICUT_CUT_PLL_COMPUTATION_SUCCESS" "DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|pll1 Cyclone III PLL " "Implemented PLL \"DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|pll1\" as Cyclone III PLL type" { { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|clk\[0\] 5 2 0 0 " "Implementing clock multiplication of 5, clock division of 2, and phase shift of 0 degrees (0 ps) for DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|clk\[0\] port" { } { { "db/altpll_9ee2.tdf" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/altpll_9ee2.tdf" 27 2 0 } } { "" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1905 9224 9983 0} } } } } 0 15099 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "Quartus II" 0 -1 1456854066485 ""} { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|clk\[1\] 5 2 -117 -2600 " "Implementing clock multiplication of 5, clock division of 2, and phase shift of -117 degrees (-2600 ps) for DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|clk\[1\] port" { } { { "db/altpll_9ee2.tdf" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/altpll_9ee2.tdf" 27 2 0 } } { "" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1906 9224 9983 0} } } } } 0 15099 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "Quartus II" 0 -1 1456854066485 ""} } { { "db/altpll_9ee2.tdf" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/altpll_9ee2.tdf" 27 2 0 } } { "" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1905 9224 9983 0} } } } } 0 15535 "Implemented %3!s! \"%1!s!\" as %2!s! PLL type" 0 0 "Fitter" 0 -1 1456854066485 ""}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1456854066550 ""}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP3C40F484C6 " "Device EP3C40F484C6 is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Quartus II" 0 -1 1456854066779 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP3C55F484C6 " "Device EP3C55F484C6 is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Quartus II" 0 -1 1456854066779 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP3C80F484C6 " "Device EP3C80F484C6 is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Quartus II" 0 -1 1456854066779 ""} } { } 2 176444 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "Fitter" 0 -1 1456854066779 ""}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "4 " "Fitter converted 4 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_ASDO_DATA1~ D1 " "Pin ~ALTERA_ASDO_DATA1~ is reserved at location D1" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { ~ALTERA_ASDO_DATA1~ } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ~ALTERA_ASDO_DATA1~ } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 10034 9224 9983 0} } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1456854066783 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_FLASH_nCE_nCSO~ E2 " "Pin ~ALTERA_FLASH_nCE_nCSO~ is reserved at location E2" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { ~ALTERA_FLASH_nCE_nCSO~ } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ~ALTERA_FLASH_nCE_nCSO~ } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 10036 9224 9983 0} } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1456854066783 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_DCLK~ K2 " "Pin ~ALTERA_DCLK~ is reserved at location K2" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { ~ALTERA_DCLK~ } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ~ALTERA_DCLK~ } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 10038 9224 9983 0} } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1456854066783 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_DATA0~ K1 " "Pin ~ALTERA_DATA0~ is reserved at location K1" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { ~ALTERA_DATA0~ } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ~ALTERA_DATA0~ } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 10040 9224 9983 0} } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1456854066783 ""} } { } 0 169124 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "Fitter" 0 -1 1456854066783 ""}
{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1456854066786 ""}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." { } { } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1456854066794 ""}
{ "Critical Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "1 143 " "No exact pin location assignment(s) for 1 pins of 143 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "VGA_CLK " "Pin VGA_CLK not assigned to an exact location on the device" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { VGA_CLK } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 1272 736 912 1288 "VGA_CLK" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { VGA_CLK } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 292 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1456854067575 ""} } { } 1 169085 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0 "Fitter" 0 -1 1456854067575 ""}
{ "Info" "ISTA_SDC_STATEMENT_PARENT" "" "Evaluating HDL-embedded SDC commands" { { "Info" "ISTA_SDC_STATEMENT_ENTITY" "dcfifo_v5o1 " "Entity dcfifo_v5o1" { { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_false_path -from *rdptr_g* -to *ws_dgrp\|dffpipe_qe9:dffpipe16\|dffe17a* " "set_false_path -from *rdptr_g* -to *ws_dgrp\|dffpipe_qe9:dffpipe16\|dffe17a* " { } { } 0 332166 "%1!s!" 0 0 "Quartus II" 0 -1 1456854068052 ""} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_false_path -from *delayed_wrptr_g* -to *rs_dgwp\|dffpipe_pe9:dffpipe13\|dffe14a* " "set_false_path -from *delayed_wrptr_g* -to *rs_dgwp\|dffpipe_pe9:dffpipe13\|dffe14a* " { } { } 0 332166 "%1!s!" 0 0 "Quartus II" 0 -1 1456854068052 ""} } { } 0 332165 "Entity %1!s!" 0 0 "Quartus II" 0 -1 1456854068052 ""} } { } 0 332164 "Evaluating HDL-embedded SDC commands" 0 0 "Fitter" 0 -1 1456854068052 ""}
{ "Info" "ISTA_SDC_FOUND" "DE0_D5M.sdc " "Reading SDC File: 'DE0_D5M.sdc'" { } { } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "Fitter" 0 -1 1456854068066 ""}
{ "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "Deriving PLL clocks " "Deriving PLL clocks" { { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{inst\|u6\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 2 -multiply_by 5 -duty_cycle 50.00 -name \{inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} " "create_generated_clock -source \{inst\|u6\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 2 -multiply_by 5 -duty_cycle 50.00 -name \{inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\]\}" { } { } 0 332110 "%1!s!" 0 0 "Quartus II" 0 -1 1456854068067 ""} { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{inst\|u6\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 2 -multiply_by 5 -phase -117.00 -duty_cycle 50.00 -name \{inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[1\]\} \{inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[1\]\} " "create_generated_clock -source \{inst\|u6\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 2 -multiply_by 5 -phase -117.00 -duty_cycle 50.00 -name \{inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[1\]\} \{inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[1\]\}" { } { } 0 332110 "%1!s!" 0 0 "Quartus II" 0 -1 1456854068067 ""} } { } 0 332110 "%1!s!" 0 0 "Fitter" 0 -1 1456854068067 ""}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "ps2:inst6\|clk_div\[8\] " "Node: ps2:inst6\|clk_div\[8\] was determined to be a clock but was found without an associated clock assignment." { } { } 0 332060 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "Fitter" 0 -1 1456854068073 "|TOP_DE0_CAMERA_MOUSE|ps2:inst6|clk_div[8]"}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "ps2:inst6\|ps2_clk_in " "Node: ps2:inst6\|ps2_clk_in was determined to be a clock but was found without an associated clock assignment." { } { } 0 332060 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "Fitter" 0 -1 1456854068073 "|TOP_DE0_CAMERA_MOUSE|ps2:inst6|ps2_clk_in"}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "DE0_D5M:inst\|rClk\[0\] " "Node: DE0_D5M:inst\|rClk\[0\] was determined to be a clock but was found without an associated clock assignment." { } { } 0 332060 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "Fitter" 0 -1 1456854068073 "|TOP_DE0_CAMERA_MOUSE|DE0_D5M:inst|rClk[0]"}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "GPIO_1_CLKIN\[0\] " "Node: GPIO_1_CLKIN\[0\] was determined to be a clock but was found without an associated clock assignment." { } { } 0 332060 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "Fitter" 0 -1 1456854068073 "|TOP_DE0_CAMERA_MOUSE|GPIO_1_CLKIN[0]"}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "DE0_D5M:inst\|I2C_CCD_Config:u8\|mI2C_CTRL_CLK " "Node: DE0_D5M:inst\|I2C_CCD_Config:u8\|mI2C_CTRL_CLK was determined to be a clock but was found without an associated clock assignment." { } { } 0 332060 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "Fitter" 0 -1 1456854068073 "|TOP_DE0_CAMERA_MOUSE|DE0_D5M:inst|I2C_CCD_Config:u8|mI2C_CTRL_CLK"}
{ "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_PARENT" "" "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." { { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "CLOCK_50 (Rise) CLOCK_50 (Rise) setup and hold " "From CLOCK_50 (Rise) to CLOCK_50 (Rise) (setup and hold)" { } { } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1456854068092 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "CLOCK_50 (Rise) inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\] (Rise) setup and hold " "From CLOCK_50 (Rise) to inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\] (Rise) (setup and hold)" { } { } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1456854068092 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\] (Rise) inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\] (Rise) setup and hold " "From inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\] (Rise) to inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\] (Rise) (setup and hold)" { } { } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1456854068092 ""} } { } 1 332168 "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." 0 0 "Fitter" 0 -1 1456854068092 ""}
{ "Info" "ISTA_USER_TDC_OPTIMIZATION_GOALS" "" "Detected timing requirements -- optimizing circuit to achieve only the specified requirements" { } { } 0 332129 "Detected timing requirements -- optimizing circuit to achieve only the specified requirements" 0 0 "Fitter" 0 -1 1456854068092 ""}
{ "Info" "ISTA_REPORT_CLOCKS_INFO" "Found 3 clocks " "Found 3 clocks" { { "Info" "ISTA_REPORT_CLOCKS_INFO" " Period Clock Name " " Period Clock Name" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 -1 1456854068092 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" "======== ============ " "======== ============" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 -1 1456854068092 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 20.000 CLOCK_50 " " 20.000 CLOCK_50" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 -1 1456854068092 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 8.000 inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 8.000 inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[0\]" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 -1 1456854068092 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 8.000 inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[1\] " " 8.000 inst\|u6\|altpll_component\|auto_generated\|pll1\|clk\[1\]" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 -1 1456854068092 ""} } { } 0 332111 "%1!s!" 0 0 "Fitter" 0 -1 1456854068092 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "CLOCK_50~input (placed in PIN G21 (CLK4, DIFFCLK_2p)) " "Automatically promoted node CLOCK_50~input (placed in PIN G21 (CLK4, DIFFCLK_2p))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G7 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G7" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068232 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|rClk\[0\] " "Destination node DE0_D5M:inst\|rClk\[0\]" { } { { "DE0_D5M.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/DE0_D5M.v" 202 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|rClk[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 2248 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068232 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "ps2:inst6\|clk_div\[8\] " "Destination node ps2:inst6\|clk_div\[8\]" { } { { "V/ps2.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/ps2.v" 97 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ps2:inst6|clk_div[8] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1204 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068232 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|I2C_CCD_Config:u8\|mI2C_CTRL_CLK " "Destination node DE0_D5M:inst\|I2C_CCD_Config:u8\|mI2C_CTRL_CLK" { } { { "V/I2C_CCD_Config.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/I2C_CCD_Config.v" 69 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|I2C_CCD_Config:u8|mI2C_CTRL_CLK } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1376 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068232 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Quartus II" 0 -1 1456854068232 ""} } { { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 88 424 592 104 "CLOCK_50" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { CLOCK_50~input } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 10018 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068232 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|clk\[0\] (placed in counter C0 of PLL_2) " "Automatically promoted node DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|clk\[0\] (placed in counter C0 of PLL_2)" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G8 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G8" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068233 ""} } { { "db/altpll_9ee2.tdf" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/altpll_9ee2.tdf" 31 2 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|sdram_pll:u6|altpll:altpll_component|altpll_9ee2:auto_generated|clk[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1905 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068233 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|clk\[1\] (placed in counter C1 of PLL_2) " "Automatically promoted node DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|clk\[1\] (placed in counter C1 of PLL_2)" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G9 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G9" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068233 ""} } { { "db/altpll_9ee2.tdf" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/altpll_9ee2.tdf" 31 2 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|sdram_pll:u6|altpll:altpll_component|altpll_9ee2:auto_generated|clk[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1905 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068233 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "GPIO_1_CLKIN\[0\]~input (placed in PIN AB11 (CLK14, DIFFCLK_6n)) " "Automatically promoted node GPIO_1_CLKIN\[0\]~input (placed in PIN AB11 (CLK14, DIFFCLK_6n))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G19 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G19" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068233 ""} } { { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 136 480 704 152 "GPIO_1_CLKIN" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1_CLKIN[0]~input } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 10027 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068233 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "DE0_D5M:inst\|rClk\[0\] " "Automatically promoted node DE0_D5M:inst\|rClk\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068233 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|rClk\[0\]~0 " "Destination node DE0_D5M:inst\|rClk\[0\]~0" { } { { "DE0_D5M.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/DE0_D5M.v" 202 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|rClk[0]~0 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5663 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068233 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "GPIO_1_CLKOUT\[0\]~output " "Destination node GPIO_1_CLKOUT\[0\]~output" { } { { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 504 1144 1354 520 "GPIO_1_CLKOUT" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1_CLKOUT[0]~output } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 9915 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068233 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "VGA_CLK~output " "Destination node VGA_CLK~output" { } { { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 1272 736 912 1288 "VGA_CLK" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { VGA_CLK~output } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 9899 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068233 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Quartus II" 0 -1 1456854068233 ""} } { { "DE0_D5M.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/DE0_D5M.v" 202 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|rClk[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 2248 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068233 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "DE0_D5M:inst\|I2C_CCD_Config:u8\|mI2C_CTRL_CLK " "Automatically promoted node DE0_D5M:inst\|I2C_CCD_Config:u8\|mI2C_CTRL_CLK " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068234 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|I2C_CCD_Config:u8\|I2C_Controller:u0\|I2C_SCLK~1 " "Destination node DE0_D5M:inst\|I2C_CCD_Config:u8\|I2C_Controller:u0\|I2C_SCLK~1" { } { { "V/I2C_Controller.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/I2C_Controller.v" 58 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|I2C_CCD_Config:u8|I2C_Controller:u0|I2C_SCLK~1 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 4638 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068234 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|I2C_CCD_Config:u8\|mI2C_CTRL_CLK~0 " "Destination node DE0_D5M:inst\|I2C_CCD_Config:u8\|mI2C_CTRL_CLK~0" { } { { "V/I2C_CCD_Config.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/I2C_CCD_Config.v" 69 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|I2C_CCD_Config:u8|mI2C_CTRL_CLK~0 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 4823 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068234 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Quartus II" 0 -1 1456854068234 ""} } { { "V/I2C_CCD_Config.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/I2C_CCD_Config.v" 69 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|I2C_CCD_Config:u8|mI2C_CTRL_CLK } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1376 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068234 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "ps2:inst6\|ps2_clk_in " "Automatically promoted node ps2:inst6\|ps2_clk_in " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068234 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "ps2:inst6\|Equal2~0 " "Destination node ps2:inst6\|Equal2~0" { } { { "V/ps2.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/ps2.v" 186 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ps2:inst6|Equal2~0 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 4459 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068234 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Quartus II" 0 -1 1456854068234 ""} } { { "V/ps2.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/ps2.v" 101 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ps2:inst6|ps2_clk_in } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1227 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068234 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "ps2:inst6\|clk_div\[8\] " "Automatically promoted node ps2:inst6\|clk_div\[8\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068234 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "ps2:inst6\|clk_div\[8\]~22 " "Destination node ps2:inst6\|clk_div\[8\]~22" { } { { "V/ps2.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/ps2.v" 97 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ps2:inst6|clk_div[8]~22 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 4453 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068234 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "ps2:inst6\|ps2_clk_in " "Destination node ps2:inst6\|ps2_clk_in" { } { { "V/ps2.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/ps2.v" 101 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ps2:inst6|ps2_clk_in } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1227 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068234 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Quartus II" 0 -1 1456854068234 ""} } { { "V/ps2.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/ps2.v" 97 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ps2:inst6|clk_div[8] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 1204 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068234 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "DE0_D5M:inst\|Reset_Delay:u2\|oRST_0 " "Automatically promoted node DE0_D5M:inst\|Reset_Delay:u2\|oRST_0 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Sdram_Control_4Port:u7\|RD_MASK\[0\]~6 " "Destination node DE0_D5M:inst\|Sdram_Control_4Port:u7\|RD_MASK\[0\]~6" { } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/Sdram_Control_4Port/Sdram_Control_4Port.v" 508 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Sdram_Control_4Port:u7|RD_MASK[0]~6 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 4546 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Sdram_Control_4Port:u7\|rWR1_ADDR\[12\]~43 " "Destination node DE0_D5M:inst\|Sdram_Control_4Port:u7\|rWR1_ADDR\[12\]~43" { } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/Sdram_Control_4Port/Sdram_Control_4Port.v" 443 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Sdram_Control_4Port:u7|rWR1_ADDR[12]~43 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5196 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Sdram_Control_4Port:u7\|rWR1_ADDR\[12\]~46 " "Destination node DE0_D5M:inst\|Sdram_Control_4Port:u7\|rWR1_ADDR\[12\]~46" { } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/Sdram_Control_4Port/Sdram_Control_4Port.v" 443 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Sdram_Control_4Port:u7|rWR1_ADDR[12]~46 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5201 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Sdram_Control_4Port:u7\|rRD2_ADDR\[16\]~45 " "Destination node DE0_D5M:inst\|Sdram_Control_4Port:u7\|rRD2_ADDR\[16\]~45" { } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/Sdram_Control_4Port/Sdram_Control_4Port.v" 443 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Sdram_Control_4Port:u7|rRD2_ADDR[16]~45 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5234 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Sdram_Control_4Port:u7\|rRD2_ADDR\[16\]~46 " "Destination node DE0_D5M:inst\|Sdram_Control_4Port:u7\|rRD2_ADDR\[16\]~46" { } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/Sdram_Control_4Port/Sdram_Control_4Port.v" 443 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Sdram_Control_4Port:u7|rRD2_ADDR[16]~46 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5235 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Sdram_Control_4Port:u7\|rWR2_ADDR\[17\]~46 " "Destination node DE0_D5M:inst\|Sdram_Control_4Port:u7\|rWR2_ADDR\[17\]~46" { } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/Sdram_Control_4Port/Sdram_Control_4Port.v" 443 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Sdram_Control_4Port:u7|rWR2_ADDR[17]~46 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5268 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Sdram_Control_4Port:u7\|rWR2_ADDR\[17\]~47 " "Destination node DE0_D5M:inst\|Sdram_Control_4Port:u7\|rWR2_ADDR\[17\]~47" { } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/Sdram_Control_4Port/Sdram_Control_4Port.v" 443 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Sdram_Control_4Port:u7|rWR2_ADDR[17]~47 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5269 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Sdram_Control_4Port:u7\|rRD1_ADDR\[16\]~43 " "Destination node DE0_D5M:inst\|Sdram_Control_4Port:u7\|rRD1_ADDR\[16\]~43" { } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/Sdram_Control_4Port/Sdram_Control_4Port.v" 443 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Sdram_Control_4Port:u7|rRD1_ADDR[16]~43 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5298 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Sdram_Control_4Port:u7\|rRD1_ADDR\[16\]~46 " "Destination node DE0_D5M:inst\|Sdram_Control_4Port:u7\|rRD1_ADDR\[16\]~46" { } { { "Sdram_Control_4Port/Sdram_Control_4Port.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/Sdram_Control_4Port/Sdram_Control_4Port.v" 443 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Sdram_Control_4Port:u7|rRD1_ADDR[16]~46 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5303 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Reset_Delay:u2\|oRST_0~2 " "Destination node DE0_D5M:inst\|Reset_Delay:u2\|oRST_0~2" { } { { "V/Reset_Delay.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/Reset_Delay.v" 46 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Reset_Delay:u2|oRST_0~2 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5640 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068235 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Quartus II" 0 -1 1456854068235 ""} } { { "V/Reset_Delay.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/Reset_Delay.v" 46 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Reset_Delay:u2|oRST_0 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 2172 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068235 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "DE0_D5M:inst\|Reset_Delay:u2\|oRST_1 " "Automatically promoted node DE0_D5M:inst\|Reset_Delay:u2\|oRST_1 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068236 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "GPIO_1\[14\]~output " "Destination node GPIO_1\[14\]~output" { } { { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1\[31..0\]" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[14]~output } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 5708 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068236 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DE0_D5M:inst\|Reset_Delay:u2\|oRST_1~1 " "Destination node DE0_D5M:inst\|Reset_Delay:u2\|oRST_1~1" { } { { "V/Reset_Delay.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/Reset_Delay.v" 47 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Reset_Delay:u2|oRST_1~1 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 4858 9224 9983 0} } } } } 0 176357 "Destination node %1!s!" 0 0 "Quartus II" 0 -1 1456854068236 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Quartus II" 0 -1 1456854068236 ""} } { { "V/Reset_Delay.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/Reset_Delay.v" 47 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DE0_D5M:inst|Reset_Delay:u2|oRST_1 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 2173 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068236 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "ps2:inst6\|Equal3~2 " "Automatically promoted node ps2:inst6\|Equal3~2 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1456854068236 ""} } { { "V/ps2.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/ps2.v" 195 -1 0 } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ps2:inst6|Equal3~2 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 4475 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1456854068236 ""}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1456854068788 ""}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Performing register packing on registers with non-logic cell location assignments" { } { } 1 176273 "Performing register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1456854068793 ""}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Completed register packing on registers with non-logic cell location assignments" { } { } 1 176274 "Completed register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1456854068793 ""}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1456854068798 ""}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1456854068805 ""}
{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1456854068809 ""}
{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1456854068810 ""}
{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" { } { } 1 176248 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1456854068813 ""}
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" { } { } 1 176249 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1456854069320 ""}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Quartus II" 0 -1 1456854069325 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1456854069325 ""}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "1 unused 3.3V 0 1 0 " "Number of I/O pins in group: 1 (unused VREF, 3.3V VCCIO, 0 input, 1 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "3.3-V LVTTL. " "I/O standards used: 3.3-V LVTTL." { } { } 0 176212 "I/O standards used: %1!s!" 0 0 "Quartus II" 0 -1 1456854069352 ""} } { } 0 176211 "Number of I/O pins in group: %1!d! (%2!s! VREF, %3!s! VCCIO, %4!d! input, %5!d! output, %6!d! bidirectional)" 0 0 "Quartus II" 0 -1 1456854069352 ""} } { } 0 176214 "Statistics of %1!s!" 0 0 "Fitter" 0 -1 1456854069352 ""}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use 3.3V 27 6 " "I/O bank number 1 does not use VREF pins and has 3.3V VCCIO pins. 27 total pin(s) used -- 6 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1456854069353 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use undetermined 0 48 " "I/O bank number 2 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used -- 48 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1456854069353 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use 3.3V 16 30 " "I/O bank number 3 does not use VREF pins and has 3.3V VCCIO pins. 16 total pin(s) used -- 30 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1456854069353 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use 3.3V 20 21 " "I/O bank number 4 does not use VREF pins and has 3.3V VCCIO pins. 20 total pin(s) used -- 21 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1456854069353 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "5 does not use 3.3V 2 44 " "I/O bank number 5 does not use VREF pins and has 3.3V VCCIO pins. 2 total pin(s) used -- 44 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1456854069353 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "6 does not use 3.3V 15 28 " "I/O bank number 6 does not use VREF pins and has 3.3V VCCIO pins. 15 total pin(s) used -- 28 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1456854069353 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "7 does not use 3.3V 28 19 " "I/O bank number 7 does not use VREF pins and has 3.3V VCCIO pins. 28 total pin(s) used -- 19 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1456854069353 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "8 does not use 3.3V 38 5 " "I/O bank number 8 does not use VREF pins and has 3.3V VCCIO pins. 38 total pin(s) used -- 5 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1456854069353 ""} } { } 0 176214 "Statistics of %1!s!" 0 0 "Quartus II" 0 -1 1456854069353 ""} } { } 0 176215 "I/O bank details %1!s! I/O pin placement" 0 0 "Fitter" 0 -1 1456854069353 ""}
{ "Warning" "WCUT_PLL_CLK_FEEDS_NON_DEDICATED_IO" "DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|pll1 clk\[1\] DRAM_CLK~output " "PLL \"DE0_D5M:inst\|sdram_pll:u6\|altpll:altpll_component\|altpll_9ee2:auto_generated\|pll1\" output port clk\[1\] feeds output pin \"DRAM_CLK~output\" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance" { } { { "db/altpll_9ee2.tdf" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/altpll_9ee2.tdf" 27 2 0 } } { "altpll.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/altpll.tdf" 897 0 0 } } { "V/sdram_pll.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/sdram_pll.v" 94 0 0 } } { "DE0_D5M.v" "" { Text "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/DE0_D5M.v" 308 0 0 } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 64 760 1048 560 "inst" "" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 328 1144 1320 344 "DRAM_CLK" "" } } } } } 0 15064 "PLL \"%1!s!\" output port %2!s! feeds output pin \"%3!s!\" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance" 0 0 "Fitter" 0 -1 1456854069421 ""}
{ "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN" "" "Ignored I/O standard assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "AUD_ADCDAT " "Ignored I/O standard assignment to node \"AUD_ADCDAT\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "AUD_ADCDAT" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "AUD_ADCLRCK " "Ignored I/O standard assignment to node \"AUD_ADCLRCK\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "AUD_ADCLRCK" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "AUD_BCLK " "Ignored I/O standard assignment to node \"AUD_BCLK\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "AUD_BCLK" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "AUD_DACDAT " "Ignored I/O standard assignment to node \"AUD_DACDAT\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "AUD_DACDAT" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "AUD_DACLRCK " "Ignored I/O standard assignment to node \"AUD_DACLRCK\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "AUD_DACLRCK" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "AUD_XCK " "Ignored I/O standard assignment to node \"AUD_XCK\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "AUD_XCK" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "BUTTON\[0\] " "Ignored I/O standard assignment to node \"BUTTON\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "BUTTON\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "BUTTON\[1\] " "Ignored I/O standard assignment to node \"BUTTON\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "BUTTON\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "BUTTON\[2\] " "Ignored I/O standard assignment to node \"BUTTON\[2\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "BUTTON\[2\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "CLOCK_50_2 " "Ignored I/O standard assignment to node \"CLOCK_50_2\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "CLOCK_50_2" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "DRAM_ADDR\[12\] " "Ignored I/O standard assignment to node \"DRAM_ADDR\[12\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[12\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[0\] " "Ignored I/O standard assignment to node \"FL_ADDR\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[10\] " "Ignored I/O standard assignment to node \"FL_ADDR\[10\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[10\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[11\] " "Ignored I/O standard assignment to node \"FL_ADDR\[11\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[11\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[12\] " "Ignored I/O standard assignment to node \"FL_ADDR\[12\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[12\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[13\] " "Ignored I/O standard assignment to node \"FL_ADDR\[13\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[13\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[14\] " "Ignored I/O standard assignment to node \"FL_ADDR\[14\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[14\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[15\] " "Ignored I/O standard assignment to node \"FL_ADDR\[15\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[15\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[16\] " "Ignored I/O standard assignment to node \"FL_ADDR\[16\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[16\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[17\] " "Ignored I/O standard assignment to node \"FL_ADDR\[17\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[17\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[18\] " "Ignored I/O standard assignment to node \"FL_ADDR\[18\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[18\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[19\] " "Ignored I/O standard assignment to node \"FL_ADDR\[19\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[19\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[1\] " "Ignored I/O standard assignment to node \"FL_ADDR\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[20\] " "Ignored I/O standard assignment to node \"FL_ADDR\[20\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[20\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[21\] " "Ignored I/O standard assignment to node \"FL_ADDR\[21\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[21\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[2\] " "Ignored I/O standard assignment to node \"FL_ADDR\[2\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[2\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[3\] " "Ignored I/O standard assignment to node \"FL_ADDR\[3\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[3\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[4\] " "Ignored I/O standard assignment to node \"FL_ADDR\[4\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[4\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[5\] " "Ignored I/O standard assignment to node \"FL_ADDR\[5\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[5\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[6\] " "Ignored I/O standard assignment to node \"FL_ADDR\[6\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[6\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[7\] " "Ignored I/O standard assignment to node \"FL_ADDR\[7\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[7\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[8\] " "Ignored I/O standard assignment to node \"FL_ADDR\[8\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[8\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_ADDR\[9\] " "Ignored I/O standard assignment to node \"FL_ADDR\[9\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_ADDR\[9\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_BYTE_N " "Ignored I/O standard assignment to node \"FL_BYTE_N\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_BYTE_N" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_CE_N " "Ignored I/O standard assignment to node \"FL_CE_N\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_CE_N" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ15_AM1 " "Ignored I/O standard assignment to node \"FL_DQ15_AM1\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ15_AM1" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[0\] " "Ignored I/O standard assignment to node \"FL_DQ\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[10\] " "Ignored I/O standard assignment to node \"FL_DQ\[10\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[10\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[11\] " "Ignored I/O standard assignment to node \"FL_DQ\[11\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[11\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[12\] " "Ignored I/O standard assignment to node \"FL_DQ\[12\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[12\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[13\] " "Ignored I/O standard assignment to node \"FL_DQ\[13\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[13\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[14\] " "Ignored I/O standard assignment to node \"FL_DQ\[14\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[14\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[1\] " "Ignored I/O standard assignment to node \"FL_DQ\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[2\] " "Ignored I/O standard assignment to node \"FL_DQ\[2\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[2\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[3\] " "Ignored I/O standard assignment to node \"FL_DQ\[3\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[3\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[4\] " "Ignored I/O standard assignment to node \"FL_DQ\[4\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[4\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[5\] " "Ignored I/O standard assignment to node \"FL_DQ\[5\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[5\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[6\] " "Ignored I/O standard assignment to node \"FL_DQ\[6\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[6\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[7\] " "Ignored I/O standard assignment to node \"FL_DQ\[7\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[7\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[8\] " "Ignored I/O standard assignment to node \"FL_DQ\[8\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[8\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_DQ\[9\] " "Ignored I/O standard assignment to node \"FL_DQ\[9\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_DQ\[9\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_OE_N " "Ignored I/O standard assignment to node \"FL_OE_N\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_OE_N" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_RST_N " "Ignored I/O standard assignment to node \"FL_RST_N\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_RST_N" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_RY " "Ignored I/O standard assignment to node \"FL_RY\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_RY" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_WE_N " "Ignored I/O standard assignment to node \"FL_WE_N\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_WE_N" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "FL_WP_N " "Ignored I/O standard assignment to node \"FL_WP_N\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "FL_WP_N" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO0_CLKIN\[0\] " "Ignored I/O standard assignment to node \"GPIO0_CLKIN\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO0_CLKIN\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO0_CLKIN\[1\] " "Ignored I/O standard assignment to node \"GPIO0_CLKIN\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO0_CLKIN\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO0_CLKOUT\[0\] " "Ignored I/O standard assignment to node \"GPIO0_CLKOUT\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO0_CLKOUT\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO0_CLKOUT\[1\] " "Ignored I/O standard assignment to node \"GPIO0_CLKOUT\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO0_CLKOUT\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO1_CLKIN\[0\] " "Ignored I/O standard assignment to node \"GPIO1_CLKIN\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO1_CLKIN\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO1_CLKIN\[1\] " "Ignored I/O standard assignment to node \"GPIO1_CLKIN\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO1_CLKIN\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO1_CLKOUT\[0\] " "Ignored I/O standard assignment to node \"GPIO1_CLKOUT\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO1_CLKOUT\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO1_CLKOUT\[1\] " "Ignored I/O standard assignment to node \"GPIO1_CLKOUT\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO1_CLKOUT\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO_1\[32\] " "Ignored I/O standard assignment to node \"GPIO_1\[32\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[32\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO_1\[33\] " "Ignored I/O standard assignment to node \"GPIO_1\[33\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[33\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO_1\[34\] " "Ignored I/O standard assignment to node \"GPIO_1\[34\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[34\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "GPIO_1\[35\] " "Ignored I/O standard assignment to node \"GPIO_1\[35\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[35\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX0_DP " "Ignored I/O standard assignment to node \"HEX0_DP\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX0_DP" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX0_D\[0\] " "Ignored I/O standard assignment to node \"HEX0_D\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX0_D\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX0_D\[1\] " "Ignored I/O standard assignment to node \"HEX0_D\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX0_D\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX0_D\[2\] " "Ignored I/O standard assignment to node \"HEX0_D\[2\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX0_D\[2\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX0_D\[3\] " "Ignored I/O standard assignment to node \"HEX0_D\[3\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX0_D\[3\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX0_D\[4\] " "Ignored I/O standard assignment to node \"HEX0_D\[4\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX0_D\[4\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX0_D\[5\] " "Ignored I/O standard assignment to node \"HEX0_D\[5\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX0_D\[5\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX0_D\[6\] " "Ignored I/O standard assignment to node \"HEX0_D\[6\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX0_D\[6\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX1_DP " "Ignored I/O standard assignment to node \"HEX1_DP\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX1_DP" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX1_D\[0\] " "Ignored I/O standard assignment to node \"HEX1_D\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX1_D\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX1_D\[1\] " "Ignored I/O standard assignment to node \"HEX1_D\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX1_D\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX1_D\[2\] " "Ignored I/O standard assignment to node \"HEX1_D\[2\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX1_D\[2\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX1_D\[3\] " "Ignored I/O standard assignment to node \"HEX1_D\[3\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX1_D\[3\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX1_D\[4\] " "Ignored I/O standard assignment to node \"HEX1_D\[4\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX1_D\[4\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX1_D\[5\] " "Ignored I/O standard assignment to node \"HEX1_D\[5\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX1_D\[5\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX1_D\[6\] " "Ignored I/O standard assignment to node \"HEX1_D\[6\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX1_D\[6\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX2_DP " "Ignored I/O standard assignment to node \"HEX2_DP\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX2_DP" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX2_D\[0\] " "Ignored I/O standard assignment to node \"HEX2_D\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX2_D\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX2_D\[1\] " "Ignored I/O standard assignment to node \"HEX2_D\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX2_D\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX2_D\[2\] " "Ignored I/O standard assignment to node \"HEX2_D\[2\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX2_D\[2\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX2_D\[3\] " "Ignored I/O standard assignment to node \"HEX2_D\[3\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX2_D\[3\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX2_D\[4\] " "Ignored I/O standard assignment to node \"HEX2_D\[4\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX2_D\[4\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX2_D\[5\] " "Ignored I/O standard assignment to node \"HEX2_D\[5\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX2_D\[5\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX2_D\[6\] " "Ignored I/O standard assignment to node \"HEX2_D\[6\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX2_D\[6\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX3_DP " "Ignored I/O standard assignment to node \"HEX3_DP\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX3_DP" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX3_D\[0\] " "Ignored I/O standard assignment to node \"HEX3_D\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX3_D\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX3_D\[1\] " "Ignored I/O standard assignment to node \"HEX3_D\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX3_D\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX3_D\[2\] " "Ignored I/O standard assignment to node \"HEX3_D\[2\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX3_D\[2\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX3_D\[3\] " "Ignored I/O standard assignment to node \"HEX3_D\[3\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX3_D\[3\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX3_D\[4\] " "Ignored I/O standard assignment to node \"HEX3_D\[4\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX3_D\[4\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX3_D\[5\] " "Ignored I/O standard assignment to node \"HEX3_D\[5\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX3_D\[5\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "HEX3_D\[6\] " "Ignored I/O standard assignment to node \"HEX3_D\[6\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX3_D\[6\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "I2C_SCLK " "Ignored I/O standard assignment to node \"I2C_SCLK\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "I2C_SCLK" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "I2C_SDAT " "Ignored I/O standard assignment to node \"I2C_SDAT\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "I2C_SDAT" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "KEY\[3\] " "Ignored I/O standard assignment to node \"KEY\[3\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY\[3\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_BLON " "Ignored I/O standard assignment to node \"LCD_BLON\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_BLON" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_DATA\[0\] " "Ignored I/O standard assignment to node \"LCD_DATA\[0\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_DATA\[0\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_DATA\[1\] " "Ignored I/O standard assignment to node \"LCD_DATA\[1\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_DATA\[1\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_DATA\[2\] " "Ignored I/O standard assignment to node \"LCD_DATA\[2\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_DATA\[2\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_DATA\[3\] " "Ignored I/O standard assignment to node \"LCD_DATA\[3\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_DATA\[3\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_DATA\[4\] " "Ignored I/O standard assignment to node \"LCD_DATA\[4\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_DATA\[4\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_DATA\[5\] " "Ignored I/O standard assignment to node \"LCD_DATA\[5\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_DATA\[5\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_DATA\[6\] " "Ignored I/O standard assignment to node \"LCD_DATA\[6\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_DATA\[6\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_DATA\[7\] " "Ignored I/O standard assignment to node \"LCD_DATA\[7\]\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_DATA\[7\]" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_EN " "Ignored I/O standard assignment to node \"LCD_EN\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_EN" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_RS " "Ignored I/O standard assignment to node \"LCD_RS\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_RS" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "LCD_RW " "Ignored I/O standard assignment to node \"LCD_RW\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "LCD_RW" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "PS2_KBCLK " "Ignored I/O standard assignment to node \"PS2_KBCLK\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "PS2_KBCLK" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "PS2_KBDAT " "Ignored I/O standard assignment to node \"PS2_KBDAT\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "PS2_KBDAT" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "SD_CLK " "Ignored I/O standard assignment to node \"SD_CLK\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SD_CLK" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "SD_CMD " "Ignored I/O standard assignment to node \"SD_CMD\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SD_CMD" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "SD_DAT0 " "Ignored I/O standard assignment to node \"SD_DAT0\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SD_DAT0" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "SD_DAT3 " "Ignored I/O standard assignment to node \"SD_DAT3\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SD_DAT3" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "SD_WP_N " "Ignored I/O standard assignment to node \"SD_WP_N\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SD_WP_N" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "UART_CTS " "Ignored I/O standard assignment to node \"UART_CTS\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "UART_CTS" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "UART_RTS " "Ignored I/O standard assignment to node \"UART_RTS\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "UART_RTS" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "UART_RXD " "Ignored I/O standard assignment to node \"UART_RXD\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "UART_RXD" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} { "Warning" "WCUT_CUT_UNATTACHED_IO_STANDARD_ASGN_SUB" "UART_TXD " "Ignored I/O standard assignment to node \"UART_TXD\"" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "UART_TXD" } } } } } 0 15710 "Ignored I/O standard assignment to node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1456854069479 ""} } { } 0 15709 "Ignored I/O standard assignments to the following nodes" 0 0 "Fitter" 0 -1 1456854069479 ""}
{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK_50_2 " "Node \"CLOCK_50_2\" is assigned to location or region, but does not exist in design" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "CLOCK_50_2" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Quartus II" 0 -1 1456854069485 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[12\] " "Node \"DRAM_ADDR\[12\]\" is assigned to location or region, but does not exist in design" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[12\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Quartus II" 0 -1 1456854069485 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX0_DP " "Node \"HEX0_DP\" is assigned to location or region, but does not exist in design" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX0_DP" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Quartus II" 0 -1 1456854069485 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX1_DP " "Node \"HEX1_DP\" is assigned to location or region, but does not exist in design" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX1_DP" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Quartus II" 0 -1 1456854069485 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX2_DP " "Node \"HEX2_DP\" is assigned to location or region, but does not exist in design" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX2_DP" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Quartus II" 0 -1 1456854069485 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX3_DP " "Node \"HEX3_DP\" is assigned to location or region, but does not exist in design" { } { { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "HEX3_DP" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Quartus II" 0 -1 1456854069485 ""} } { } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1456854069485 ""}
{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:03 " "Fitter preparation operations ending: elapsed time is 00:00:03" { } { } 0 171121 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1456854069486 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1456854070265 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:01 " "Fitter placement preparation operations ending: elapsed time is 00:00:01" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1456854070812 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1456854070835 ""}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1456854072956 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:02 " "Fitter placement operations ending: elapsed time is 00:00:02" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1456854072956 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1456854073648 ""}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "4 " "Router estimated average interconnect usage is 4% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "11 X21_Y10 X30_Y19 " "Router estimated peak interconnect usage is 11% of the available device resources in the region that extends from location X21_Y10 to location X30_Y19" { } { { "loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 1 { 0 "Router estimated peak interconnect usage is 11% of the available device resources in the region that extends from location X21_Y10 to location X30_Y19"} { { 11 { 0 "Router estimated peak interconnect usage is 11% of the available device resources in the region that extends from location X21_Y10 to location X30_Y19"} 21 10 10 10 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Quartus II" 0 -1 1456854075112 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1456854075112 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:03 " "Fitter routing operations ending: elapsed time is 00:00:03" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1456854076806 ""}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Quartus II" 0 -1 1456854076809 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1456854076809 ""}
{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "2.03 " "Total time spent on timing analysis during the Fitter is 2.03 seconds." { } { } 0 11888 "Total time spent on timing analysis during the Fitter is %1!s! seconds." 0 0 "Fitter" 0 -1 1456854076900 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1456854076931 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1456854077366 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1456854077394 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1456854077686 ""}
{ "Info" "IFITCC_FITTER_POST_OPERATION_END" "00:00:02 " "Fitter post-fit operations ending: elapsed time is 00:00:02" { } { } 0 11218 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1456854078469 ""}
{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." { } { } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1456854079180 ""}
{ "Warning" "WFIOMGR_FIOMGR_REFER_APPNOTE_447_TOP_LEVEL" "66 Cyclone III " "66 pins must meet Altera requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing Cyclone III Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems." { { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1_CLKIN\[1\] 3.3-V LVTTL AA11 " "Pin GPIO_1_CLKIN\[1\] uses I/O standard 3.3-V LVTTL at AA11" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1_CLKIN[1] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1_CLKIN\[1\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 136 480 704 152 "GPIO_1_CLKIN" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1_CLKIN[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 202 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[9\] 3.3-V LVTTL D2 " "Pin SW\[9\] uses I/O standard 3.3-V LVTTL at D2" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[9] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[9\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[9] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 207 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[8\] 3.3-V LVTTL E4 " "Pin SW\[8\] uses I/O standard 3.3-V LVTTL at E4" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[8] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[8\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[8] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 208 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[15\] 3.3-V LVTTL F10 " "Pin DRAM_DQ\[15\] uses I/O standard 3.3-V LVTTL at F10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[15] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[15\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[15] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 154 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[14\] 3.3-V LVTTL E10 " "Pin DRAM_DQ\[14\] uses I/O standard 3.3-V LVTTL at E10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[14] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[14\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[14] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 155 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[13\] 3.3-V LVTTL A10 " "Pin DRAM_DQ\[13\] uses I/O standard 3.3-V LVTTL at A10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[13] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[13\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[13] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 156 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[12\] 3.3-V LVTTL B10 " "Pin DRAM_DQ\[12\] uses I/O standard 3.3-V LVTTL at B10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[12] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[12\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[12] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 157 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[11\] 3.3-V LVTTL C10 " "Pin DRAM_DQ\[11\] uses I/O standard 3.3-V LVTTL at C10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[11] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[11\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[11] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 158 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[10\] 3.3-V LVTTL A9 " "Pin DRAM_DQ\[10\] uses I/O standard 3.3-V LVTTL at A9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[10] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[10\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[10] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 159 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[9\] 3.3-V LVTTL B9 " "Pin DRAM_DQ\[9\] uses I/O standard 3.3-V LVTTL at B9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[9] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[9\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[9] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 160 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[8\] 3.3-V LVTTL A8 " "Pin DRAM_DQ\[8\] uses I/O standard 3.3-V LVTTL at A8" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[8] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[8\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[8] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 161 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[7\] 3.3-V LVTTL F8 " "Pin DRAM_DQ\[7\] uses I/O standard 3.3-V LVTTL at F8" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[7] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[7\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[7] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 162 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[6\] 3.3-V LVTTL H9 " "Pin DRAM_DQ\[6\] uses I/O standard 3.3-V LVTTL at H9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[6] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[6\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[6] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 163 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[5\] 3.3-V LVTTL G9 " "Pin DRAM_DQ\[5\] uses I/O standard 3.3-V LVTTL at G9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[5] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[5\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 164 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[4\] 3.3-V LVTTL F9 " "Pin DRAM_DQ\[4\] uses I/O standard 3.3-V LVTTL at F9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[4] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[4\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 165 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[3\] 3.3-V LVTTL E9 " "Pin DRAM_DQ\[3\] uses I/O standard 3.3-V LVTTL at E9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[3] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[3\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 166 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[2\] 3.3-V LVTTL H10 " "Pin DRAM_DQ\[2\] uses I/O standard 3.3-V LVTTL at H10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[2] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[2\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 167 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[1\] 3.3-V LVTTL G10 " "Pin DRAM_DQ\[1\] uses I/O standard 3.3-V LVTTL at G10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[1] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[1\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 168 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "DRAM_DQ\[0\] 3.3-V LVTTL D10 " "Pin DRAM_DQ\[0\] uses I/O standard 3.3-V LVTTL at D10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { DRAM_DQ[0] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[0\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 168 1144 1328 184 "DRAM_DQ" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { DRAM_DQ[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 169 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[31\] 3.3-V LVTTL V7 " "Pin GPIO_1\[31\] uses I/O standard 3.3-V LVTTL at V7" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[31] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[31\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[31] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 170 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[30\] 3.3-V LVTTL V6 " "Pin GPIO_1\[30\] uses I/O standard 3.3-V LVTTL at V6" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[30] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[30\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[30] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 171 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[29\] 3.3-V LVTTL U8 " "Pin GPIO_1\[29\] uses I/O standard 3.3-V LVTTL at U8" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[29] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[29\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[29] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 172 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[28\] 3.3-V LVTTL Y7 " "Pin GPIO_1\[28\] uses I/O standard 3.3-V LVTTL at Y7" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[28] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[28\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[28] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 173 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[27\] 3.3-V LVTTL T9 " "Pin GPIO_1\[27\] uses I/O standard 3.3-V LVTTL at T9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[27] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[27\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[27] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 174 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[26\] 3.3-V LVTTL U9 " "Pin GPIO_1\[26\] uses I/O standard 3.3-V LVTTL at U9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[26] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[26\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[26] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 175 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[25\] 3.3-V LVTTL T10 " "Pin GPIO_1\[25\] uses I/O standard 3.3-V LVTTL at T10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[25] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[25\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[25] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 176 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[24\] 3.3-V LVTTL U10 " "Pin GPIO_1\[24\] uses I/O standard 3.3-V LVTTL at U10" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[24] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[24\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[24] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 177 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[23\] 3.3-V LVTTL R12 " "Pin GPIO_1\[23\] uses I/O standard 3.3-V LVTTL at R12" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[23] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[23\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[23] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 178 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[22\] 3.3-V LVTTL R11 " "Pin GPIO_1\[22\] uses I/O standard 3.3-V LVTTL at R11" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[22] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[22\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[22] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 179 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[21\] 3.3-V LVTTL T12 " "Pin GPIO_1\[21\] uses I/O standard 3.3-V LVTTL at T12" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[21] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[21\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[21] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 180 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[20\] 3.3-V LVTTL U12 " "Pin GPIO_1\[20\] uses I/O standard 3.3-V LVTTL at U12" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[20] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[20\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[20] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 181 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[19\] 3.3-V LVTTL R14 " "Pin GPIO_1\[19\] uses I/O standard 3.3-V LVTTL at R14" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[19] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[19\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[19] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 182 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[18\] 3.3-V LVTTL T14 " "Pin GPIO_1\[18\] uses I/O standard 3.3-V LVTTL at T14" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[18] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[18\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[18] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 183 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[17\] 3.3-V LVTTL AB7 " "Pin GPIO_1\[17\] uses I/O standard 3.3-V LVTTL at AB7" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[17] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[17\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[17] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 184 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[16\] 3.3-V LVTTL AA7 " "Pin GPIO_1\[16\] uses I/O standard 3.3-V LVTTL at AA7" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[16] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[16\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[16] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 185 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[15\] 3.3-V LVTTL AA9 " "Pin GPIO_1\[15\] uses I/O standard 3.3-V LVTTL at AA9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[15] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[15\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[15] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 186 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[14\] 3.3-V LVTTL AB9 " "Pin GPIO_1\[14\] uses I/O standard 3.3-V LVTTL at AB9" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[14] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[14\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[14] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 187 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[13\] 3.3-V LVTTL V15 " "Pin GPIO_1\[13\] uses I/O standard 3.3-V LVTTL at V15" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[13] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[13\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[13] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 188 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[12\] 3.3-V LVTTL W15 " "Pin GPIO_1\[12\] uses I/O standard 3.3-V LVTTL at W15" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[12] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[12\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[12] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 189 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[11\] 3.3-V LVTTL T15 " "Pin GPIO_1\[11\] uses I/O standard 3.3-V LVTTL at T15" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[11] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[11\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[11] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 190 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[10\] 3.3-V LVTTL U15 " "Pin GPIO_1\[10\] uses I/O standard 3.3-V LVTTL at U15" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[10] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[10\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[10] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 191 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[9\] 3.3-V LVTTL W17 " "Pin GPIO_1\[9\] uses I/O standard 3.3-V LVTTL at W17" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[9] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[9\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[9] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 192 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[8\] 3.3-V LVTTL Y17 " "Pin GPIO_1\[8\] uses I/O standard 3.3-V LVTTL at Y17" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[8] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[8\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[8] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 193 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[7\] 3.3-V LVTTL AB17 " "Pin GPIO_1\[7\] uses I/O standard 3.3-V LVTTL at AB17" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[7] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[7\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[7] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 194 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[6\] 3.3-V LVTTL AA17 " "Pin GPIO_1\[6\] uses I/O standard 3.3-V LVTTL at AA17" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[6] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[6\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[6] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 195 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[5\] 3.3-V LVTTL AA18 " "Pin GPIO_1\[5\] uses I/O standard 3.3-V LVTTL at AA18" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[5] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[5\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 196 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[4\] 3.3-V LVTTL AB18 " "Pin GPIO_1\[4\] uses I/O standard 3.3-V LVTTL at AB18" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[4] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[4\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 197 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[3\] 3.3-V LVTTL AB19 " "Pin GPIO_1\[3\] uses I/O standard 3.3-V LVTTL at AB19" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[3] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[3\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 198 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[2\] 3.3-V LVTTL AA19 " "Pin GPIO_1\[2\] uses I/O standard 3.3-V LVTTL at AA19" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[2] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[2\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 199 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[1\] 3.3-V LVTTL AB20 " "Pin GPIO_1\[1\] uses I/O standard 3.3-V LVTTL at AB20" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[1] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[1\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 200 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1\[0\] 3.3-V LVTTL AA20 " "Pin GPIO_1\[0\] uses I/O standard 3.3-V LVTTL at AA20" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[0] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[0\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 201 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "PS2_DAT 3.3-V LVTTL P21 " "Pin PS2_DAT uses I/O standard 3.3-V LVTTL at P21" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { PS2_DAT } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "PS2_DAT" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 576 376 552 592 "PS2_DAT" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { PS2_DAT } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 295 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "PS2_CLK 3.3-V LVTTL P22 " "Pin PS2_CLK uses I/O standard 3.3-V LVTTL at P22" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { PS2_CLK } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "PS2_CLK" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 600 376 552 616 "PS2_CLK" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { PS2_CLK } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 296 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[4\] 3.3-V LVTTL G5 " "Pin SW\[4\] uses I/O standard 3.3-V LVTTL at G5" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[4] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[4\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 212 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[5\] 3.3-V LVTTL J7 " "Pin SW\[5\] uses I/O standard 3.3-V LVTTL at J7" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[5] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[5\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 211 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "CLOCK_50 3.3-V LVTTL G21 " "Pin CLOCK_50 uses I/O standard 3.3-V LVTTL at G21" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { CLOCK_50 } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "CLOCK_50" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 88 424 592 104 "CLOCK_50" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { CLOCK_50 } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 282 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "KEY\[0\] 3.3-V LVTTL H2 " "Pin KEY\[0\] uses I/O standard 3.3-V LVTTL at H2" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { KEY[0] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY\[0\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 104 424 592 120 "KEY" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { KEY[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 206 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[7\] 3.3-V LVTTL E3 " "Pin SW\[7\] uses I/O standard 3.3-V LVTTL at E3" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[7] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[7\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[7] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 209 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[6\] 3.3-V LVTTL H7 " "Pin SW\[6\] uses I/O standard 3.3-V LVTTL at H7" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[6] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[6\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[6] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 210 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[3\] 3.3-V LVTTL G4 " "Pin SW\[3\] uses I/O standard 3.3-V LVTTL at G4" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[3] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[3\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 213 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[2\] 3.3-V LVTTL H6 " "Pin SW\[2\] uses I/O standard 3.3-V LVTTL at H6" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[2] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[2\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 214 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[1\] 3.3-V LVTTL H5 " "Pin SW\[1\] uses I/O standard 3.3-V LVTTL at H5" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[1] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[1\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 215 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[0\] 3.3-V LVTTL J6 " "Pin SW\[0\] uses I/O standard 3.3-V LVTTL at J6" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { SW[0] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[0\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 120 512 680 136 "SW" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { SW[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 216 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "KEY\[1\] 3.3-V LVTTL G3 " "Pin KEY\[1\] uses I/O standard 3.3-V LVTTL at G3" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { KEY[1] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY\[1\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 104 424 592 120 "KEY" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { KEY[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 205 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GPIO_1_CLKIN\[0\] 3.3-V LVTTL AB11 " "Pin GPIO_1_CLKIN\[0\] uses I/O standard 3.3-V LVTTL at AB11" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1_CLKIN[0] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1_CLKIN\[0\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 136 480 704 152 "GPIO_1_CLKIN" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1_CLKIN[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 203 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "KEY\[2\] 3.3-V LVTTL F1 " "Pin KEY\[2\] uses I/O standard 3.3-V LVTTL at F1" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { KEY[2] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY\[2\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 104 424 592 120 "KEY" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { KEY[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 204 9224 9983 0} } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Quartus II" 0 -1 1456854079213 ""} } { } 0 169177 "%1!d! pins must meet Altera requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing %2!s! Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems." 0 0 "Fitter" 0 -1 1456854079213 ""}
{ "Warning" "WFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE" "31 " "Following 31 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results" { { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[31\] a permanently disabled " "Pin GPIO_1\[31\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[31] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[31\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[31] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 170 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[30\] a permanently disabled " "Pin GPIO_1\[30\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[30] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[30\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[30] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 171 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[29\] a permanently disabled " "Pin GPIO_1\[29\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[29] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[29\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[29] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 172 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[28\] a permanently disabled " "Pin GPIO_1\[28\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[28] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[28\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[28] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 173 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[27\] a permanently disabled " "Pin GPIO_1\[27\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[27] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[27\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[27] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 174 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[26\] a permanently disabled " "Pin GPIO_1\[26\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[26] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[26\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[26] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 175 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[25\] a permanently disabled " "Pin GPIO_1\[25\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[25] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[25\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[25] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 176 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[24\] a permanently disabled " "Pin GPIO_1\[24\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[24] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[24\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[24] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 177 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[23\] a permanently disabled " "Pin GPIO_1\[23\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[23] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[23\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[23] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 178 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[22\] a permanently disabled " "Pin GPIO_1\[22\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[22] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[22\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[22] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 179 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[21\] a permanently disabled " "Pin GPIO_1\[21\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[21] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[21\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[21] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 180 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[20\] a permanently enabled " "Pin GPIO_1\[20\] has a permanently enabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[20] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[20\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[20] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 181 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[18\] a permanently disabled " "Pin GPIO_1\[18\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[18] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[18\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[18] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 183 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[17\] a permanently disabled " "Pin GPIO_1\[17\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[17] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[17\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[17] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 184 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[16\] a permanently disabled " "Pin GPIO_1\[16\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[16] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[16\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[16] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 185 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[15\] a permanently enabled " "Pin GPIO_1\[15\] has a permanently enabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[15] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[15\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[15] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 186 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[14\] a permanently enabled " "Pin GPIO_1\[14\] has a permanently enabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[14] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[14\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[14] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 187 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[13\] a permanently disabled " "Pin GPIO_1\[13\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[13] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[13\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[13] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 188 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[12\] a permanently disabled " "Pin GPIO_1\[12\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[12] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[12\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[12] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 189 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[11\] a permanently disabled " "Pin GPIO_1\[11\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[11] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[11\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[11] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 190 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[10\] a permanently disabled " "Pin GPIO_1\[10\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[10] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[10\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[10] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 191 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[9\] a permanently disabled " "Pin GPIO_1\[9\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[9] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[9\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[9] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 192 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[8\] a permanently disabled " "Pin GPIO_1\[8\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[8] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[8\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[8] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 193 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[7\] a permanently disabled " "Pin GPIO_1\[7\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[7] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[7\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[7] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 194 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[6\] a permanently disabled " "Pin GPIO_1\[6\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[6] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[6\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[6] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 195 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[5\] a permanently disabled " "Pin GPIO_1\[5\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[5] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[5\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 196 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[4\] a permanently disabled " "Pin GPIO_1\[4\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[4] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[4\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 197 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[3\] a permanently disabled " "Pin GPIO_1\[3\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[3] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[3\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 198 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[2\] a permanently disabled " "Pin GPIO_1\[2\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[2] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[2\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 199 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[1\] a permanently disabled " "Pin GPIO_1\[1\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[1] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[1\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 200 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "GPIO_1\[0\] a permanently disabled " "Pin GPIO_1\[0\] has a permanently disabled output enable" { } { { "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0sp1/quartus/bin64/pin_planner.ppl" { GPIO_1[0] } } } { "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/altera/13.0sp1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[0\]" } } } } { "V/TOP_DE0_CAMERA_MOUSE.bdf" "" { Schematic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/V/TOP_DE0_CAMERA_MOUSE.bdf" { { 520 1144 1320 536 "GPIO_1" "" } } } } { "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0sp1/quartus/bin64/TimingClosureFloorplan.fld" "" "" { GPIO_1[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/" { { 0 { 0 ""} 0 201 9224 9983 0} } } } } 0 169065 "Pin %1!s! has %2!s! output enable" 0 0 "Quartus II" 0 -1 1456854079219 ""} } { } 0 169064 "Following %1!d! pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results" 0 0 "Fitter" 0 -1 1456854079219 ""}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/DE0_D5M.fit.smsg " "Generated suppressed messages file C:/Catapult C/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/DE0_D5M.fit.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1456854079476 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 149 s Quartus II 64-Bit " "Quartus II 64-Bit Fitter was successful. 0 errors, 149 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1149 " "Peak virtual memory: 1149 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1456854080107 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Mar 01 17:41:20 2016 " "Processing ended: Tue Mar 01 17:41:20 2016" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1456854080107 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:15 " "Elapsed time: 00:00:15" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1456854080107 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:17 " "Total CPU time (on all processors): 00:00:17" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1456854080107 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1456854080107 ""}
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