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A collection of Quartus projects to learn FPGA design.
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path:
root
/
stopClockVerilog
/
db
/
stopclock.cbx.xml
blob: 7a8d93db188869c36c9fc0f318d75ae499c4dffd (
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<?xml
version
=
"1.0"
?>
<LOG_ROOT>
<PROJECT
NAME
=
"stopclock"
>
</PROJECT>
</LOG_ROOT>