stopClockVerilog/output_files/stopclock.cdf


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/* Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition */
JedecChain;
	FileRevision(JESD32A);
	DefaultMfr(6E);

	P ActionCode(Cfg)
		Device PartName(EP3C16U484) Path("C:/Users/Asus/OneDrive - Imperial College London/Documents/Verilog/stopclockVerilog/output_files/") File("stopclock.sof") MfrSpec(OpMask(1));

ChainEnd;

AlteraBegin;
	ChainType(JTAG);
AlteraEnd;