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| author | Yann Herklotz <ymherklotz@gmail.com> | 2017-02-22 00:14:38 +0000 |
|---|---|---|
| committer | Yann Herklotz <ymherklotz@gmail.com> | 2017-02-22 00:14:38 +0000 |
| commit | e318230b35fc130d74f1b4c6b70bbb2d5afe6780 (patch) | |
| tree | 1a1730eb8f35f6932ce82e349c2dba1c089b1b64 /planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml | |
| parent | 0446c43ffae38888dfad9120281acde6a7954509 (diff) | |
| download | FPGA_Playground-e318230b35fc130d74f1b4c6b70bbb2d5afe6780.tar.gz FPGA_Playground-e318230b35fc130d74f1b4c6b70bbb2d5afe6780.zip | |
Diffstat (limited to 'planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml')
| -rw-r--r-- | planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml b/planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml new file mode 100644 index 0000000..9fa644d --- /dev/null +++ b/planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml @@ -0,0 +1,24 @@ +<?xml version="1.0" encoding="UTF-8"?> +<DARoots Version="1" Minor="26"> + <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1"> + <Filter Type="EDIFSrcs"/> + <File Path="$PPRDIR/../led.ngc"> + <FileInfo> + <Attr Name="UsedInSynthesis" Val="1"/> + <Attr Name="UsedInImplementation" Val="1"/> + </FileInfo> + </File> + <File Path="$PDATADIR/sources_1/ports.xml"> + <FileInfo SFType="PortsDb"/> + </File> + <File Path="$PDATADIR/sources_1/chipscope.xml"> + <FileInfo SFType="ChipscopeDb"/> + </File> + <Config> + <Option Name="DesignMode" Val="GateLvl"/> + <Option Name="GateLvlMode" Val="EDIF"/> + <Option Name="TopFile" Val="$PPRDIR/../led.ngc"/> + <Option Name="TopAutoSet" Val="TRUE"/> + </Config> + </FileSet> +</DARoots> |