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-rw-r--r--planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml24
1 files changed, 24 insertions, 0 deletions
diff --git a/planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml b/planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml
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+<?xml version="1.0" encoding="UTF-8"?>
+<DARoots Version="1" Minor="26">
+ <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
+ <Filter Type="EDIFSrcs"/>
+ <File Path="$PPRDIR/../led.ngc">
+ <FileInfo>
+ <Attr Name="UsedInSynthesis" Val="1"/>
+ <Attr Name="UsedInImplementation" Val="1"/>
+ </FileInfo>
+ </File>
+ <File Path="$PDATADIR/sources_1/ports.xml">
+ <FileInfo SFType="PortsDb"/>
+ </File>
+ <File Path="$PDATADIR/sources_1/chipscope.xml">
+ <FileInfo SFType="ChipscopeDb"/>
+ </File>
+ <Config>
+ <Option Name="DesignMode" Val="GateLvl"/>
+ <Option Name="GateLvlMode" Val="EDIF"/>
+ <Option Name="TopFile" Val="$PPRDIR/../led.ngc"/>
+ <Option Name="TopAutoSet" Val="TRUE"/>
+ </Config>
+ </FileSet>
+</DARoots>