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-rwxr-xr-xpart_4/ex16/simulation/modelsim/ex16_top_modelsim.xrf287
1 files changed, 287 insertions, 0 deletions
diff --git a/part_4/ex16/simulation/modelsim/ex16_top_modelsim.xrf b/part_4/ex16/simulation/modelsim/ex16_top_modelsim.xrf
new file mode 100755
index 0000000..5aee938
--- /dev/null
+++ b/part_4/ex16/simulation/modelsim/ex16_top_modelsim.xrf
@@ -0,0 +1,287 @@
+vendor_name = ModelSim
+source_file = 1, C:/New folder/ex16/ex16_top.sdc
+source_file = 1, C:/New folder/ex16/hex_to_7seg.v
+source_file = 1, C:/New folder/ex16/clktick_16.v
+source_file = 1, C:/New folder/ex16/spi2dac.v
+source_file = 1, C:/New folder/ex16/spi2adc.v
+source_file = 1, C:/New folder/ex16/pwm.v
+source_file = 1, C:/New folder/ex16/delay_ram.v
+source_file = 1, C:/New folder/ex16/ex16_top.v
+source_file = 1, C:/New folder/ex16/mult4.v
+source_file = 1, C:/New folder/ex16/db/ex16_top.cbx.xml
+design_name = ex16_top
+instance = comp, \HEX0[0]~output , HEX0[0]~output, ex16_top, 1
+instance = comp, \HEX0[1]~output , HEX0[1]~output, ex16_top, 1
+instance = comp, \HEX0[2]~output , HEX0[2]~output, ex16_top, 1
+instance = comp, \HEX0[3]~output , HEX0[3]~output, ex16_top, 1
+instance = comp, \HEX0[4]~output , HEX0[4]~output, ex16_top, 1
+instance = comp, \HEX0[5]~output , HEX0[5]~output, ex16_top, 1
+instance = comp, \HEX0[6]~output , HEX0[6]~output, ex16_top, 1
+instance = comp, \HEX1[0]~output , HEX1[0]~output, ex16_top, 1
+instance = comp, \HEX1[1]~output , HEX1[1]~output, ex16_top, 1
+instance = comp, \HEX1[2]~output , HEX1[2]~output, ex16_top, 1
+instance = comp, \HEX1[3]~output , HEX1[3]~output, ex16_top, 1
+instance = comp, \HEX1[4]~output , HEX1[4]~output, ex16_top, 1
+instance = comp, \HEX1[5]~output , HEX1[5]~output, ex16_top, 1
+instance = comp, \HEX1[6]~output , HEX1[6]~output, ex16_top, 1
+instance = comp, \HEX2[0]~output , HEX2[0]~output, ex16_top, 1
+instance = comp, \HEX2[1]~output , HEX2[1]~output, ex16_top, 1
+instance = comp, \HEX2[2]~output , HEX2[2]~output, ex16_top, 1
+instance = comp, \HEX2[3]~output , HEX2[3]~output, ex16_top, 1
+instance = comp, \HEX2[4]~output , HEX2[4]~output, ex16_top, 1
+instance = comp, \HEX2[5]~output , HEX2[5]~output, ex16_top, 1
+instance = comp, \HEX2[6]~output , HEX2[6]~output, ex16_top, 1
+instance = comp, \DAC_SDI~output , DAC_SDI~output, ex16_top, 1
+instance = comp, \DAC_SCK~output , DAC_SCK~output, ex16_top, 1
+instance = comp, \DAC_CS~output , DAC_CS~output, ex16_top, 1
+instance = comp, \DAC_LD~output , DAC_LD~output, ex16_top, 1
+instance = comp, \ADC_SDI~output , ADC_SDI~output, ex16_top, 1
+instance = comp, \ADC_SCK~output , ADC_SCK~output, ex16_top, 1
+instance = comp, \ADC_CS~output , ADC_CS~output, ex16_top, 1
+instance = comp, \PWM_OUT~output , PWM_OUT~output, ex16_top, 1
+instance = comp, \CLOCK_50~input , CLOCK_50~input, ex16_top, 1
+instance = comp, \SPI_ADC|clk_1MHz~0 , SPI_ADC|clk_1MHz~0, ex16_top, 1
+instance = comp, \SPI_ADC|clk_1MHz~feeder , SPI_ADC|clk_1MHz~feeder, ex16_top, 1
+instance = comp, \CLOCK_50~inputCLKENA0 , CLOCK_50~inputCLKENA0, ex16_top, 1
+instance = comp, \SPI_ADC|ctr[2] , SPI_ADC|ctr[2], ex16_top, 1
+instance = comp, \SPI_ADC|ctr~2 , SPI_ADC|ctr~2, ex16_top, 1
+instance = comp, \SPI_ADC|ctr[1] , SPI_ADC|ctr[1], ex16_top, 1
+instance = comp, \SPI_ADC|ctr~0 , SPI_ADC|ctr~0, ex16_top, 1
+instance = comp, \SPI_ADC|ctr[2]~DUPLICATE , SPI_ADC|ctr[2]~DUPLICATE, ex16_top, 1
+instance = comp, \SPI_ADC|Add0~1 , SPI_ADC|Add0~1, ex16_top, 1
+instance = comp, \SPI_ADC|ctr[3] , SPI_ADC|ctr[3], ex16_top, 1
+instance = comp, \SPI_ADC|Add0~0 , SPI_ADC|Add0~0, ex16_top, 1
+instance = comp, \SPI_ADC|ctr[4] , SPI_ADC|ctr[4], ex16_top, 1
+instance = comp, \SPI_ADC|ctr~1 , SPI_ADC|ctr~1, ex16_top, 1
+instance = comp, \SPI_ADC|ctr[0] , SPI_ADC|ctr[0], ex16_top, 1
+instance = comp, \SPI_ADC|ctr[4]~DUPLICATE , SPI_ADC|ctr[4]~DUPLICATE, ex16_top, 1
+instance = comp, \SPI_DAC|Equal0~0 , SPI_DAC|Equal0~0, ex16_top, 1
+instance = comp, \SPI_ADC|clk_1MHz , SPI_ADC|clk_1MHz, ex16_top, 1
+instance = comp, \ADC_SDO~input , ADC_SDO~input, ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[0]~feeder , SPI_ADC|shift_reg[0]~feeder, ex16_top, 1
+instance = comp, \GEN_10K|Add0~9 , GEN_10K|Add0~9, ex16_top, 1
+instance = comp, \GEN_10K|count[0] , GEN_10K|count[0], ex16_top, 1
+instance = comp, \GEN_10K|Add0~13 , GEN_10K|Add0~13, ex16_top, 1
+instance = comp, \GEN_10K|count[1] , GEN_10K|count[1], ex16_top, 1
+instance = comp, \GEN_10K|Add0~17 , GEN_10K|Add0~17, ex16_top, 1
+instance = comp, \GEN_10K|count[2] , GEN_10K|count[2], ex16_top, 1
+instance = comp, \GEN_10K|Add0~33 , GEN_10K|Add0~33, ex16_top, 1
+instance = comp, \GEN_10K|count[3] , GEN_10K|count[3], ex16_top, 1
+instance = comp, \GEN_10K|Add0~37 , GEN_10K|Add0~37, ex16_top, 1
+instance = comp, \GEN_10K|count[4] , GEN_10K|count[4], ex16_top, 1
+instance = comp, \GEN_10K|Add0~41 , GEN_10K|Add0~41, ex16_top, 1
+instance = comp, \GEN_10K|count[5] , GEN_10K|count[5], ex16_top, 1
+instance = comp, \GEN_10K|Add0~45 , GEN_10K|Add0~45, ex16_top, 1
+instance = comp, \GEN_10K|count[6] , GEN_10K|count[6], ex16_top, 1
+instance = comp, \GEN_10K|Add0~21 , GEN_10K|Add0~21, ex16_top, 1
+instance = comp, \GEN_10K|count[7] , GEN_10K|count[7], ex16_top, 1
+instance = comp, \GEN_10K|Add0~25 , GEN_10K|Add0~25, ex16_top, 1
+instance = comp, \GEN_10K|count[8] , GEN_10K|count[8], ex16_top, 1
+instance = comp, \GEN_10K|Add0~1 , GEN_10K|Add0~1, ex16_top, 1
+instance = comp, \GEN_10K|count[9] , GEN_10K|count[9], ex16_top, 1
+instance = comp, \GEN_10K|Add0~5 , GEN_10K|Add0~5, ex16_top, 1
+instance = comp, \GEN_10K|count[10] , GEN_10K|count[10], ex16_top, 1
+instance = comp, \GEN_10K|Equal0~0 , GEN_10K|Equal0~0, ex16_top, 1
+instance = comp, \GEN_10K|Add0~49 , GEN_10K|Add0~49, ex16_top, 1
+instance = comp, \GEN_10K|count[11] , GEN_10K|count[11], ex16_top, 1
+instance = comp, \GEN_10K|Add0~29 , GEN_10K|Add0~29, ex16_top, 1
+instance = comp, \GEN_10K|count[12] , GEN_10K|count[12], ex16_top, 1
+instance = comp, \GEN_10K|Equal0~1 , GEN_10K|Equal0~1, ex16_top, 1
+instance = comp, \GEN_10K|count[14] , GEN_10K|count[14], ex16_top, 1
+instance = comp, \GEN_10K|Add0~53 , GEN_10K|Add0~53, ex16_top, 1
+instance = comp, \GEN_10K|count[13] , GEN_10K|count[13], ex16_top, 1
+instance = comp, \GEN_10K|Add0~61 , GEN_10K|Add0~61, ex16_top, 1
+instance = comp, \GEN_10K|count[14]~DUPLICATE , GEN_10K|count[14]~DUPLICATE, ex16_top, 1
+instance = comp, \GEN_10K|count[11]~DUPLICATE , GEN_10K|count[11]~DUPLICATE, ex16_top, 1
+instance = comp, \GEN_10K|Add0~57 , GEN_10K|Add0~57, ex16_top, 1
+instance = comp, \GEN_10K|count[15] , GEN_10K|count[15], ex16_top, 1
+instance = comp, \GEN_10K|Equal0~2 , GEN_10K|Equal0~2, ex16_top, 1
+instance = comp, \GEN_10K|Equal0~3 , GEN_10K|Equal0~3, ex16_top, 1
+instance = comp, \GEN_10K|tick~feeder , GEN_10K|tick~feeder, ex16_top, 1
+instance = comp, \GEN_10K|tick , GEN_10K|tick, ex16_top, 1
+instance = comp, \SPI_ADC|Selector2~0 , SPI_ADC|Selector2~0, ex16_top, 1
+instance = comp, \SPI_ADC|sr_state.WAIT_CSB_HIGH , SPI_ADC|sr_state.WAIT_CSB_HIGH, ex16_top, 1
+instance = comp, \SPI_ADC|Selector0~0 , SPI_ADC|Selector0~0, ex16_top, 1
+instance = comp, \SPI_ADC|sr_state.IDLE , SPI_ADC|sr_state.IDLE, ex16_top, 1
+instance = comp, \SPI_ADC|Selector1~0 , SPI_ADC|Selector1~0, ex16_top, 1
+instance = comp, \SPI_ADC|sr_state.WAIT_CSB_FALL , SPI_ADC|sr_state.WAIT_CSB_FALL, ex16_top, 1
+instance = comp, \SPI_ADC|adc_start~0 , SPI_ADC|adc_start~0, ex16_top, 1
+instance = comp, \SPI_ADC|adc_start , SPI_ADC|adc_start, ex16_top, 1
+instance = comp, \SPI_ADC|state[2]~2 , SPI_ADC|state[2]~2, ex16_top, 1
+instance = comp, \SPI_ADC|state[2] , SPI_ADC|state[2], ex16_top, 1
+instance = comp, \SPI_ADC|state[3]~3 , SPI_ADC|state[3]~3, ex16_top, 1
+instance = comp, \SPI_ADC|state[3] , SPI_ADC|state[3], ex16_top, 1
+instance = comp, \SPI_ADC|state~0 , SPI_ADC|state~0, ex16_top, 1
+instance = comp, \SPI_ADC|state[4] , SPI_ADC|state[4], ex16_top, 1
+instance = comp, \SPI_ADC|Selector5~0 , SPI_ADC|Selector5~0, ex16_top, 1
+instance = comp, \SPI_ADC|state[0] , SPI_ADC|state[0], ex16_top, 1
+instance = comp, \SPI_ADC|state[1]~1 , SPI_ADC|state[1]~1, ex16_top, 1
+instance = comp, \SPI_ADC|state[1] , SPI_ADC|state[1], ex16_top, 1
+instance = comp, \SPI_ADC|Selector4~0 , SPI_ADC|Selector4~0, ex16_top, 1
+instance = comp, \SPI_ADC|adc_cs , SPI_ADC|adc_cs, ex16_top, 1
+instance = comp, \SPI_ADC|WideOr0~0 , SPI_ADC|WideOr0~0, ex16_top, 1
+instance = comp, \SPI_ADC|shift_ena , SPI_ADC|shift_ena, ex16_top, 1
+instance = comp, \SPI_ADC|always3~0 , SPI_ADC|always3~0, ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[0] , SPI_ADC|shift_reg[0], ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[1] , SPI_ADC|shift_reg[1], ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[2]~feeder , SPI_ADC|shift_reg[2]~feeder, ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[2]~DUPLICATE , SPI_ADC|shift_reg[2]~DUPLICATE, ex16_top, 1
+instance = comp, \SPI_ADC|Decoder0~0 , SPI_ADC|Decoder0~0, ex16_top, 1
+instance = comp, \SPI_ADC|adc_done , SPI_ADC|adc_done, ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[2] , SPI_ADC|data_from_adc[2], ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[2] , SPI_ADC|shift_reg[2], ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[3] , SPI_ADC|shift_reg[3], ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[3] , SPI_ADC|data_from_adc[3], ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[0] , SPI_ADC|data_from_adc[0], ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[1]~DUPLICATE , SPI_ADC|shift_reg[1]~DUPLICATE, ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[1] , SPI_ADC|data_from_adc[1], ex16_top, 1
+instance = comp, \SEG0|WideOr6~0 , SEG0|WideOr6~0, ex16_top, 1
+instance = comp, \SEG0|WideOr5~0 , SEG0|WideOr5~0, ex16_top, 1
+instance = comp, \SEG0|WideOr4~0 , SEG0|WideOr4~0, ex16_top, 1
+instance = comp, \SEG0|WideOr3~0 , SEG0|WideOr3~0, ex16_top, 1
+instance = comp, \SEG0|WideOr2~0 , SEG0|WideOr2~0, ex16_top, 1
+instance = comp, \SEG0|WideOr1~0 , SEG0|WideOr1~0, ex16_top, 1
+instance = comp, \SEG0|WideOr0~0 , SEG0|WideOr0~0, ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[4] , SPI_ADC|shift_reg[4], ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[5]~feeder , SPI_ADC|shift_reg[5]~feeder, ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[5] , SPI_ADC|shift_reg[5], ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[6]~feeder , SPI_ADC|shift_reg[6]~feeder, ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[6] , SPI_ADC|shift_reg[6], ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[6] , SPI_ADC|data_from_adc[6], ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[7]~feeder , SPI_ADC|shift_reg[7]~feeder, ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[7] , SPI_ADC|shift_reg[7], ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[7] , SPI_ADC|data_from_adc[7], ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[5] , SPI_ADC|data_from_adc[5], ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[4] , SPI_ADC|data_from_adc[4], ex16_top, 1
+instance = comp, \SEG1|WideOr6~0 , SEG1|WideOr6~0, ex16_top, 1
+instance = comp, \SEG1|WideOr5~0 , SEG1|WideOr5~0, ex16_top, 1
+instance = comp, \SEG1|WideOr4~0 , SEG1|WideOr4~0, ex16_top, 1
+instance = comp, \SEG1|WideOr3~0 , SEG1|WideOr3~0, ex16_top, 1
+instance = comp, \SEG1|WideOr2~0 , SEG1|WideOr2~0, ex16_top, 1
+instance = comp, \SEG1|WideOr1~0 , SEG1|WideOr1~0, ex16_top, 1
+instance = comp, \SEG1|WideOr0~0 , SEG1|WideOr0~0, ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[8] , SPI_ADC|shift_reg[8], ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[9]~feeder , SPI_ADC|shift_reg[9]~feeder, ex16_top, 1
+instance = comp, \SPI_ADC|shift_reg[9] , SPI_ADC|shift_reg[9], ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[9] , SPI_ADC|data_from_adc[9], ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[8]~feeder , SPI_ADC|data_from_adc[8]~feeder, ex16_top, 1
+instance = comp, \SPI_ADC|data_from_adc[8] , SPI_ADC|data_from_adc[8], ex16_top, 1
+instance = comp, \SEG2|Decoder0~0 , SEG2|Decoder0~0, ex16_top, 1
+instance = comp, \SEG2|Decoder0~1 , SEG2|Decoder0~1, ex16_top, 1
+instance = comp, \SEG2|Decoder0~2 , SEG2|Decoder0~2, ex16_top, 1
+instance = comp, \SPI_DAC|clk_1MHz~0 , SPI_DAC|clk_1MHz~0, ex16_top, 1
+instance = comp, \SPI_DAC|clk_1MHz~feeder , SPI_DAC|clk_1MHz~feeder, ex16_top, 1
+instance = comp, \SPI_DAC|clk_1MHz , SPI_DAC|clk_1MHz, ex16_top, 1
+instance = comp, \SPI_DAC|sr_state.IDLE , SPI_DAC|sr_state.IDLE, ex16_top, 1
+instance = comp, \SPI_DAC|Selector2~0 , SPI_DAC|Selector2~0, ex16_top, 1
+instance = comp, \SPI_DAC|sr_state.WAIT_CSB_HIGH , SPI_DAC|sr_state.WAIT_CSB_HIGH, ex16_top, 1
+instance = comp, \SPI_DAC|Selector0~0 , SPI_DAC|Selector0~0, ex16_top, 1
+instance = comp, \SPI_DAC|sr_state.IDLE~DUPLICATE , SPI_DAC|sr_state.IDLE~DUPLICATE, ex16_top, 1
+instance = comp, \SPI_DAC|Selector1~0 , SPI_DAC|Selector1~0, ex16_top, 1
+instance = comp, \SPI_DAC|sr_state.WAIT_CSB_FALL , SPI_DAC|sr_state.WAIT_CSB_FALL, ex16_top, 1
+instance = comp, \SPI_DAC|dac_start~0 , SPI_DAC|dac_start~0, ex16_top, 1
+instance = comp, \SPI_DAC|dac_start , SPI_DAC|dac_start, ex16_top, 1
+instance = comp, \SPI_DAC|Selector5~0 , SPI_DAC|Selector5~0, ex16_top, 1
+instance = comp, \SPI_DAC|state[3] , SPI_DAC|state[3], ex16_top, 1
+instance = comp, \SPI_DAC|Selector4~0 , SPI_DAC|Selector4~0, ex16_top, 1
+instance = comp, \SPI_DAC|state[4] , SPI_DAC|state[4], ex16_top, 1
+instance = comp, \SPI_DAC|Selector8~0 , SPI_DAC|Selector8~0, ex16_top, 1
+instance = comp, \SPI_DAC|state[0] , SPI_DAC|state[0], ex16_top, 1
+instance = comp, \SPI_DAC|Selector7~0 , SPI_DAC|Selector7~0, ex16_top, 1
+instance = comp, \SPI_DAC|state[1] , SPI_DAC|state[1], ex16_top, 1
+instance = comp, \SPI_DAC|Selector6~0 , SPI_DAC|Selector6~0, ex16_top, 1
+instance = comp, \SPI_DAC|state[2] , SPI_DAC|state[2], ex16_top, 1
+instance = comp, \SPI_DAC|Selector9~0 , SPI_DAC|Selector9~0, ex16_top, 1
+instance = comp, \SPI_DAC|dac_cs , SPI_DAC|dac_cs, ex16_top, 1
+instance = comp, \ALLPASS|Add0~17 , ALLPASS|Add0~17, ex16_top, 1
+instance = comp, \ALLPASS|Add0~13 , ALLPASS|Add0~13, ex16_top, 1
+instance = comp, \ALLPASS|Add0~9 , ALLPASS|Add0~9, ex16_top, 1
+instance = comp, \ALLPASS|Add0~29 , ALLPASS|Add0~29, ex16_top, 1
+instance = comp, \ALLPASS|Add0~25 , ALLPASS|Add0~25, ex16_top, 1
+instance = comp, \ALLPASS|Add0~21 , ALLPASS|Add0~21, ex16_top, 1
+instance = comp, \ALLPASS|data_out[7] , ALLPASS|data_out[7], ex16_top, 1
+instance = comp, \ALLPASS|data_out[6] , ALLPASS|data_out[6], ex16_top, 1
+instance = comp, \ALLPASS|data_out[3] , ALLPASS|data_out[3], ex16_top, 1
+instance = comp, \ALLPASS|data_out[2] , ALLPASS|data_out[2], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~11 , SPI_DAC|shift_reg~11, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[4] , SPI_DAC|shift_reg[4], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~10 , SPI_DAC|shift_reg~10, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[5] , SPI_DAC|shift_reg[5], ex16_top, 1
+instance = comp, \ALLPASS|data_out[4] , ALLPASS|data_out[4], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~9 , SPI_DAC|shift_reg~9, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[6] , SPI_DAC|shift_reg[6], ex16_top, 1
+instance = comp, \ALLPASS|data_out[5] , ALLPASS|data_out[5], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~8 , SPI_DAC|shift_reg~8, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[7] , SPI_DAC|shift_reg[7], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~7 , SPI_DAC|shift_reg~7, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[8] , SPI_DAC|shift_reg[8], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~6 , SPI_DAC|shift_reg~6, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[9] , SPI_DAC|shift_reg[9], ex16_top, 1
+instance = comp, \ALLPASS|Add0~5 , ALLPASS|Add0~5, ex16_top, 1
+instance = comp, \ALLPASS|data_out[8] , ALLPASS|data_out[8], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~5 , SPI_DAC|shift_reg~5, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[10] , SPI_DAC|shift_reg[10], ex16_top, 1
+instance = comp, \ALLPASS|Add0~1 , ALLPASS|Add0~1, ex16_top, 1
+instance = comp, \ALLPASS|data_out[9]~0 , ALLPASS|data_out[9]~0, ex16_top, 1
+instance = comp, \ALLPASS|data_out[9] , ALLPASS|data_out[9], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~4 , SPI_DAC|shift_reg~4, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[11] , SPI_DAC|shift_reg[11], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~3 , SPI_DAC|shift_reg~3, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[12] , SPI_DAC|shift_reg[12], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~2 , SPI_DAC|shift_reg~2, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[13] , SPI_DAC|shift_reg[13], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~1 , SPI_DAC|shift_reg~1, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[14] , SPI_DAC|shift_reg[14], ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg~0 , SPI_DAC|shift_reg~0, ex16_top, 1
+instance = comp, \SPI_DAC|shift_reg[15] , SPI_DAC|shift_reg[15], ex16_top, 1
+instance = comp, \SPI_DAC|dac_sck , SPI_DAC|dac_sck, ex16_top, 1
+instance = comp, \SPI_DAC|Equal2~0 , SPI_DAC|Equal2~0, ex16_top, 1
+instance = comp, \SPI_DAC|dac_ld , SPI_DAC|dac_ld, ex16_top, 1
+instance = comp, \SPI_ADC|Selector6~0 , SPI_ADC|Selector6~0, ex16_top, 1
+instance = comp, \SPI_ADC|adc_din , SPI_ADC|adc_din, ex16_top, 1
+instance = comp, \SPI_ADC|adc_sck , SPI_ADC|adc_sck, ex16_top, 1
+instance = comp, \PWM_DC|count[0]~0 , PWM_DC|count[0]~0, ex16_top, 1
+instance = comp, \PWM_DC|count[0] , PWM_DC|count[0], ex16_top, 1
+instance = comp, \PWM_DC|Add0~21 , PWM_DC|Add0~21, ex16_top, 1
+instance = comp, \PWM_DC|count[1] , PWM_DC|count[1], ex16_top, 1
+instance = comp, \PWM_DC|Add0~17 , PWM_DC|Add0~17, ex16_top, 1
+instance = comp, \PWM_DC|count[2] , PWM_DC|count[2], ex16_top, 1
+instance = comp, \PWM_DC|Add0~13 , PWM_DC|Add0~13, ex16_top, 1
+instance = comp, \PWM_DC|count[3] , PWM_DC|count[3], ex16_top, 1
+instance = comp, \PWM_DC|Add0~9 , PWM_DC|Add0~9, ex16_top, 1
+instance = comp, \PWM_DC|count[4] , PWM_DC|count[4], ex16_top, 1
+instance = comp, \PWM_DC|Add0~33 , PWM_DC|Add0~33, ex16_top, 1
+instance = comp, \PWM_DC|count[5] , PWM_DC|count[5], ex16_top, 1
+instance = comp, \PWM_DC|Add0~29 , PWM_DC|Add0~29, ex16_top, 1
+instance = comp, \PWM_DC|count[6] , PWM_DC|count[6], ex16_top, 1
+instance = comp, \PWM_DC|Add0~25 , PWM_DC|Add0~25, ex16_top, 1
+instance = comp, \PWM_DC|count[7] , PWM_DC|count[7], ex16_top, 1
+instance = comp, \PWM_DC|Add0~5 , PWM_DC|Add0~5, ex16_top, 1
+instance = comp, \PWM_DC|count[8] , PWM_DC|count[8], ex16_top, 1
+instance = comp, \PWM_DC|Add0~1 , PWM_DC|Add0~1, ex16_top, 1
+instance = comp, \PWM_DC|count[9] , PWM_DC|count[9], ex16_top, 1
+instance = comp, \PWM_DC|d[9] , PWM_DC|d[9], ex16_top, 1
+instance = comp, \PWM_DC|d[2] , PWM_DC|d[2], ex16_top, 1
+instance = comp, \PWM_DC|LessThan0~0 , PWM_DC|LessThan0~0, ex16_top, 1
+instance = comp, \PWM_DC|d[7] , PWM_DC|d[7], ex16_top, 1
+instance = comp, \PWM_DC|d[6] , PWM_DC|d[6], ex16_top, 1
+instance = comp, \PWM_DC|d[5] , PWM_DC|d[5], ex16_top, 1
+instance = comp, \PWM_DC|LessThan0~1 , PWM_DC|LessThan0~1, ex16_top, 1
+instance = comp, \PWM_DC|d[3] , PWM_DC|d[3], ex16_top, 1
+instance = comp, \PWM_DC|d[4] , PWM_DC|d[4], ex16_top, 1
+instance = comp, \PWM_DC|LessThan0~2 , PWM_DC|LessThan0~2, ex16_top, 1
+instance = comp, \PWM_DC|LessThan0~3 , PWM_DC|LessThan0~3, ex16_top, 1
+instance = comp, \PWM_DC|d[8] , PWM_DC|d[8], ex16_top, 1
+instance = comp, \PWM_DC|LessThan0~4 , PWM_DC|LessThan0~4, ex16_top, 1
+instance = comp, \PWM_DC|pwm_out , PWM_DC|pwm_out, ex16_top, 1
+instance = comp, \SW[0]~input , SW[0]~input, ex16_top, 1
+instance = comp, \SW[1]~input , SW[1]~input, ex16_top, 1
+instance = comp, \SW[2]~input , SW[2]~input, ex16_top, 1
+instance = comp, \SW[3]~input , SW[3]~input, ex16_top, 1
+instance = comp, \SW[4]~input , SW[4]~input, ex16_top, 1
+instance = comp, \SW[5]~input , SW[5]~input, ex16_top, 1
+instance = comp, \SW[6]~input , SW[6]~input, ex16_top, 1
+instance = comp, \SW[7]~input , SW[7]~input, ex16_top, 1
+instance = comp, \SW[8]~input , SW[8]~input, ex16_top, 1
+instance = comp, \SW[9]~input , SW[9]~input, ex16_top, 1
+instance = comp, \~QUARTUS_CREATED_GND~I , ~QUARTUS_CREATED_GND~I, ex16_top, 1
generated by cgit (git 2.34.1) at 2024-05-28 22:35:43 +0000