1 files changed, 2308 insertions, 0 deletions
diff --git a/part_4/ex19/db/ex19.hier_info b/part_4/ex19/db/ex19.hier_info
new file mode 100755
index 0000000..cfea879
--- /dev/null
+++ b/part_4/ex19/db/ex19.hier_info
@@ -0,0 +1,2308 @@
+|ex19
+CLOCK_50 => CLOCK_50.IN5
+SW[0] => SW[0].IN1
+SW[1] => SW[1].IN1
+SW[2] => SW[2].IN1
+SW[3] => SW[3].IN1
+SW[4] => SW[4].IN1
+SW[5] => SW[5].IN1
+SW[6] => SW[6].IN1
+SW[7] => SW[7].IN1
+SW[8] => SW[8].IN1
+SW[9] => SW[9].IN1
+HEX0[0] << processor:echo_var_delay.port6
+HEX0[1] << processor:echo_var_delay.port6
+HEX0[2] << processor:echo_var_delay.port6
+HEX0[3] << processor:echo_var_delay.port6
+HEX0[4] << processor:echo_var_delay.port6
+HEX0[5] << processor:echo_var_delay.port6
+HEX0[6] << processor:echo_var_delay.port6
+HEX1[0] << processor:echo_var_delay.port7
+HEX1[1] << processor:echo_var_delay.port7
+HEX1[2] << processor:echo_var_delay.port7
+HEX1[3] << processor:echo_var_delay.port7
+HEX1[4] << processor:echo_var_delay.port7
+HEX1[5] << processor:echo_var_delay.port7
+HEX1[6] << processor:echo_var_delay.port7
+HEX2[0] << processor:echo_var_delay.port8
+HEX2[1] << processor:echo_var_delay.port8
+HEX2[2] << processor:echo_var_delay.port8
+HEX2[3] << processor:echo_var_delay.port8
+HEX2[4] << processor:echo_var_delay.port8
+HEX2[5] << processor:echo_var_delay.port8
+HEX2[6] << processor:echo_var_delay.port8
+HEX3[0] << processor:echo_var_delay.port9
+HEX3[1] << processor:echo_var_delay.port9
+HEX3[2] << processor:echo_var_delay.port9
+HEX3[3] << processor:echo_var_delay.port9
+HEX3[4] << processor:echo_var_delay.port9
+HEX3[5] << processor:echo_var_delay.port9
+HEX3[6] << processor:echo_var_delay.port9
+HEX4[0] << processor:echo_var_delay.port10
+HEX4[1] << processor:echo_var_delay.port10
+HEX4[2] << processor:echo_var_delay.port10
+HEX4[3] << processor:echo_var_delay.port10
+HEX4[4] << processor:echo_var_delay.port10
+HEX4[5] << processor:echo_var_delay.port10
+HEX4[6] << processor:echo_var_delay.port10
+DAC_SDI << spi2dac:SPI_DAC.port3
+DAC_SCK << spi2dac:SPI_DAC.port5
+DAC_CS << spi2dac:SPI_DAC.port4
+DAC_LD << spi2dac:SPI_DAC.port6
+ADC_SDI << spi2adc:SPI_ADC.sdata_to_adc
+ADC_SCK << spi2adc:SPI_ADC.adc_sck
+ADC_CS << spi2adc:SPI_ADC.adc_cs
+ADC_SDO => ADC_SDO.IN1
+PWM_OUT << pwm:PWM_DC.port3
+
+
+|ex19|clktick_16:GEN_10K
+clkin => count[0].CLK
+clkin => count[1].CLK
+clkin => count[2].CLK
+clkin => count[3].CLK
+clkin => count[4].CLK
+clkin => count[5].CLK
+clkin => count[6].CLK
+clkin => count[7].CLK
+clkin => count[8].CLK
+clkin => count[9].CLK
+clkin => count[10].CLK
+clkin => count[11].CLK
+clkin => count[12].CLK
+clkin => count[13].CLK
+clkin => count[14].CLK
+clkin => count[15].CLK
+clkin => tick~reg0.CLK
+enable => count[0].ENA
+enable => count[1].ENA
+enable => count[2].ENA
+enable => count[3].ENA
+enable => count[4].ENA
+enable => count[5].ENA
+enable => count[6].ENA
+enable => count[7].ENA
+enable => count[8].ENA
+enable => count[9].ENA
+enable => count[10].ENA
+enable => count[11].ENA
+enable => count[12].ENA
+enable => count[13].ENA
+enable => count[14].ENA
+enable => count[15].ENA
+enable => tick~reg0.ENA
+N[0] => count.DATAB
+N[1] => count.DATAB
+N[2] => count.DATAB
+N[3] => count.DATAB
+N[4] => count.DATAB
+N[5] => count.DATAB
+N[6] => count.DATAB
+N[7] => count.DATAB
+N[8] => count.DATAB
+N[9] => count.DATAB
+N[10] => count.DATAB
+N[11] => count.DATAB
+N[12] => count.DATAB
+N[13] => count.DATAB
+N[14] => count.DATAB
+N[15] => count.DATAB
+tick <= tick~reg0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|spi2dac:SPI_DAC
+clk => dac_start.CLK
+clk => clk_1MHz.CLK
+clk => ctr[0].CLK
+clk => ctr[1].CLK
+clk => ctr[2].CLK
+clk => ctr[3].CLK
+clk => ctr[4].CLK
+clk => sr_state~1.DATAIN
+data_in[0] => shift_reg.DATAB
+data_in[1] => shift_reg.DATAB
+data_in[2] => shift_reg.DATAB
+data_in[3] => shift_reg.DATAB
+data_in[4] => shift_reg.DATAB
+data_in[5] => shift_reg.DATAB
+data_in[6] => shift_reg.DATAB
+data_in[7] => shift_reg.DATAB
+data_in[8] => shift_reg.DATAB
+data_in[9] => shift_reg.DATAB
+load => Selector1.IN1
+load => dac_start.OUTPUTSELECT
+load => Selector0.IN1
+dac_sdi <= shift_reg[15].DB_MAX_OUTPUT_PORT_TYPE
+dac_cs <= dac_cs~reg0.DB_MAX_OUTPUT_PORT_TYPE
+dac_sck <= dac_sck.DB_MAX_OUTPUT_PORT_TYPE
+dac_ld <= dac_ld~reg0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|pwm:PWM_DC
+clk => pwm_out~reg0.CLK
+clk => count[0].CLK
+clk => count[1].CLK
+clk => count[2].CLK
+clk => count[3].CLK
+clk => count[4].CLK
+clk => count[5].CLK
+clk => count[6].CLK
+clk => count[7].CLK
+clk => count[8].CLK
+clk => count[9].CLK
+clk => d[0].CLK
+clk => d[1].CLK
+clk => d[2].CLK
+clk => d[3].CLK
+clk => d[4].CLK
+clk => d[5].CLK
+clk => d[6].CLK
+clk => d[7].CLK
+clk => d[8].CLK
+clk => d[9].CLK
+data_in[0] => d[0].DATAIN
+data_in[1] => d[1].DATAIN
+data_in[2] => d[2].DATAIN
+data_in[3] => d[3].DATAIN
+data_in[4] => d[4].DATAIN
+data_in[5] => d[5].DATAIN
+data_in[6] => d[6].DATAIN
+data_in[7] => d[7].DATAIN
+data_in[8] => d[8].DATAIN
+data_in[9] => d[9].DATAIN
+load => d[0].ENA
+load => d[1].ENA
+load => d[2].ENA
+load => d[3].ENA
+load => d[4].ENA
+load => d[5].ENA
+load => d[6].ENA
+load => d[7].ENA
+load => d[8].ENA
+load => d[9].ENA
+pwm_out <= pwm_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|spi2adc:SPI_ADC
+sysclk => adc_start.CLK
+sysclk => clk_1MHz.CLK
+sysclk => ctr[0].CLK
+sysclk => ctr[1].CLK
+sysclk => ctr[2].CLK
+sysclk => ctr[3].CLK
+sysclk => ctr[4].CLK
+sysclk => sr_state~1.DATAIN
+start => Selector1.IN1
+start => adc_start.OUTPUTSELECT
+start => Selector0.IN1
+channel => Selector6.IN6
+data_from_adc[0] <= data_from_adc[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_from_adc[1] <= data_from_adc[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_from_adc[2] <= data_from_adc[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_from_adc[3] <= data_from_adc[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_from_adc[4] <= data_from_adc[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_from_adc[5] <= data_from_adc[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_from_adc[6] <= data_from_adc[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_from_adc[7] <= data_from_adc[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_from_adc[8] <= data_from_adc[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_from_adc[9] <= data_from_adc[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_valid <= adc_cs~reg0.DB_MAX_OUTPUT_PORT_TYPE
+sdata_to_adc <= adc_din.DB_MAX_OUTPUT_PORT_TYPE
+adc_cs <= adc_cs~reg0.DB_MAX_OUTPUT_PORT_TYPE
+adc_sck <= adc_sck.DB_MAX_OUTPUT_PORT_TYPE
+sdata_from_adc => shift_reg[0].DATAIN
+
+
+|ex19|processor:echo_var_delay
+sysclk => sysclk.IN1
+tick => tick.IN2
+SW[0] => SW[0].IN1
+SW[1] => SW[1].IN1
+SW[2] => SW[2].IN1
+SW[3] => SW[3].IN1
+SW[4] => SW[4].IN1
+SW[5] => SW[5].IN1
+SW[6] => SW[6].IN1
+SW[7] => SW[7].IN1
+SW[8] => SW[8].IN1
+SW[9] => SW[9].IN1
+data_in[0] => data_in[0].IN1
+data_in[1] => data_in[1].IN1
+data_in[2] => data_in[2].IN1
+data_in[3] => data_in[3].IN1
+data_in[4] => data_in[4].IN1
+data_in[5] => data_in[5].IN1
+data_in[6] => data_in[6].IN1
+data_in[7] => data_in[7].IN1
+data_in[8] => data_in[8].IN1
+data_in[9] => data_in[9].IN1
+data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_out[1] <= data_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_out[2] <= data_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_out[3] <= data_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_out[4] <= data_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_out[5] <= data_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_out[6] <= data_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_out[7] <= data_out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_out[8] <= data_out[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_out[9] <= data_out[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
+data_valid => _.IN1
+hex0[0] <= hex_to_7seg:h0.port0
+hex0[1] <= hex_to_7seg:h0.port0
+hex0[2] <= hex_to_7seg:h0.port0
+hex0[3] <= hex_to_7seg:h0.port0
+hex0[4] <= hex_to_7seg:h0.port0
+hex0[5] <= hex_to_7seg:h0.port0
+hex0[6] <= hex_to_7seg:h0.port0
+hex1[0] <= hex_to_7seg:h1.port0
+hex1[1] <= hex_to_7seg:h1.port0
+hex1[2] <= hex_to_7seg:h1.port0
+hex1[3] <= hex_to_7seg:h1.port0
+hex1[4] <= hex_to_7seg:h1.port0
+hex1[5] <= hex_to_7seg:h1.port0
+hex1[6] <= hex_to_7seg:h1.port0
+hex2[0] <= hex_to_7seg:h2.port0
+hex2[1] <= hex_to_7seg:h2.port0
+hex2[2] <= hex_to_7seg:h2.port0
+hex2[3] <= hex_to_7seg:h2.port0
+hex2[4] <= hex_to_7seg:h2.port0
+hex2[5] <= hex_to_7seg:h2.port0
+hex2[6] <= hex_to_7seg:h2.port0
+hex3[0] <= hex_to_7seg:h3.port0
+hex3[1] <= hex_to_7seg:h3.port0
+hex3[2] <= hex_to_7seg:h3.port0
+hex3[3] <= hex_to_7seg:h3.port0
+hex3[4] <= hex_to_7seg:h3.port0
+hex3[5] <= hex_to_7seg:h3.port0
+hex3[6] <= hex_to_7seg:h3.port0
+hex4[0] <= hex_to_7seg:h4.port0
+hex4[1] <= hex_to_7seg:h4.port0
+hex4[2] <= hex_to_7seg:h4.port0
+hex4[3] <= hex_to_7seg:h4.port0
+hex4[4] <= hex_to_7seg:h4.port0
+hex4[5] <= hex_to_7seg:h4.port0
+hex4[6] <= hex_to_7seg:h4.port0
+
+
+|ex19|processor:echo_var_delay|ctr_13_bit:ctr
+clock => clock.IN1
+q[0] <= lpm_counter:LPM_COUNTER_component.q
+q[1] <= lpm_counter:LPM_COUNTER_component.q
+q[2] <= lpm_counter:LPM_COUNTER_component.q
+q[3] <= lpm_counter:LPM_COUNTER_component.q
+q[4] <= lpm_counter:LPM_COUNTER_component.q
+q[5] <= lpm_counter:LPM_COUNTER_component.q
+q[6] <= lpm_counter:LPM_COUNTER_component.q
+q[7] <= lpm_counter:LPM_COUNTER_component.q
+q[8] <= lpm_counter:LPM_COUNTER_component.q
+q[9] <= lpm_counter:LPM_COUNTER_component.q
+q[10] <= lpm_counter:LPM_COUNTER_component.q
+q[11] <= lpm_counter:LPM_COUNTER_component.q
+q[12] <= lpm_counter:LPM_COUNTER_component.q
+
+
+|ex19|processor:echo_var_delay|ctr_13_bit:ctr|lpm_counter:LPM_COUNTER_component
+clock => cntr_cjh:auto_generated.clock
+clk_en => ~NO_FANOUT~
+cnt_en => ~NO_FANOUT~
+updown => ~NO_FANOUT~
+aclr => ~NO_FANOUT~
+aset => ~NO_FANOUT~
+aconst => ~NO_FANOUT~
+aload => ~NO_FANOUT~
+sclr => ~NO_FANOUT~
+sset => ~NO_FANOUT~
+sconst => ~NO_FANOUT~
+sload => ~NO_FANOUT~
+data[0] => ~NO_FANOUT~
+data[1] => ~NO_FANOUT~
+data[2] => ~NO_FANOUT~
+data[3] => ~NO_FANOUT~
+data[4] => ~NO_FANOUT~
+data[5] => ~NO_FANOUT~
+data[6] => ~NO_FANOUT~
+data[7] => ~NO_FANOUT~
+data[8] => ~NO_FANOUT~
+data[9] => ~NO_FANOUT~
+data[10] => ~NO_FANOUT~
+data[11] => ~NO_FANOUT~
+data[12] => ~NO_FANOUT~
+cin => ~NO_FANOUT~
+q[0] <= cntr_cjh:auto_generated.q[0]
+q[1] <= cntr_cjh:auto_generated.q[1]
+q[2] <= cntr_cjh:auto_generated.q[2]
+q[3] <= cntr_cjh:auto_generated.q[3]
+q[4] <= cntr_cjh:auto_generated.q[4]
+q[5] <= cntr_cjh:auto_generated.q[5]
+q[6] <= cntr_cjh:auto_generated.q[6]
+q[7] <= cntr_cjh:auto_generated.q[7]
+q[8] <= cntr_cjh:auto_generated.q[8]
+q[9] <= cntr_cjh:auto_generated.q[9]
+q[10] <= cntr_cjh:auto_generated.q[10]
+q[11] <= cntr_cjh:auto_generated.q[11]
+q[12] <= cntr_cjh:auto_generated.q[12]
+cout <= <GND>
+eq[0] <= <GND>
+eq[1] <= <GND>
+eq[2] <= <GND>
+eq[3] <= <GND>
+eq[4] <= <GND>
+eq[5] <= <GND>
+eq[6] <= <GND>
+eq[7] <= <GND>
+eq[8] <= <GND>
+eq[9] <= <GND>
+eq[10] <= <GND>
+eq[11] <= <GND>
+eq[12] <= <GND>
+eq[13] <= <GND>
+eq[14] <= <GND>
+eq[15] <= <GND>
+
+
+|ex19|processor:echo_var_delay|ctr_13_bit:ctr|lpm_counter:LPM_COUNTER_component|cntr_cjh:auto_generated
+clock => counter_reg_bit[12].CLK
+clock => counter_reg_bit[11].CLK
+clock => counter_reg_bit[10].CLK
+clock => counter_reg_bit[9].CLK
+clock => counter_reg_bit[8].CLK
+clock => counter_reg_bit[7].CLK
+clock => counter_reg_bit[6].CLK
+clock => counter_reg_bit[5].CLK
+clock => counter_reg_bit[4].CLK
+clock => counter_reg_bit[3].CLK
+clock => counter_reg_bit[2].CLK
+clock => counter_reg_bit[1].CLK
+clock => counter_reg_bit[0].CLK
+q[0] <= counter_reg_bit[0].DB_MAX_OUTPUT_PORT_TYPE
+q[1] <= counter_reg_bit[1].DB_MAX_OUTPUT_PORT_TYPE
+q[2] <= counter_reg_bit[2].DB_MAX_OUTPUT_PORT_TYPE
+q[3] <= counter_reg_bit[3].DB_MAX_OUTPUT_PORT_TYPE
+q[4] <= counter_reg_bit[4].DB_MAX_OUTPUT_PORT_TYPE
+q[5] <= counter_reg_bit[5].DB_MAX_OUTPUT_PORT_TYPE
+q[6] <= counter_reg_bit[6].DB_MAX_OUTPUT_PORT_TYPE
+q[7] <= counter_reg_bit[7].DB_MAX_OUTPUT_PORT_TYPE
+q[8] <= counter_reg_bit[8].DB_MAX_OUTPUT_PORT_TYPE
+q[9] <= counter_reg_bit[9].DB_MAX_OUTPUT_PORT_TYPE
+q[10] <= counter_reg_bit[10].DB_MAX_OUTPUT_PORT_TYPE
+q[11] <= counter_reg_bit[11].DB_MAX_OUTPUT_PORT_TYPE
+q[12] <= counter_reg_bit[12].DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|delay_block:del
+clock => clock.IN1
+data[0] => data[0].IN1
+data[1] => data[1].IN1
+data[2] => data[2].IN1
+data[3] => data[3].IN1
+data[4] => data[4].IN1
+data[5] => data[5].IN1
+data[6] => data[6].IN1
+data[7] => data[7].IN1
+data[8] => data[8].IN1
+rdaddress[0] => rdaddress[0].IN1
+rdaddress[1] => rdaddress[1].IN1
+rdaddress[2] => rdaddress[2].IN1
+rdaddress[3] => rdaddress[3].IN1
+rdaddress[4] => rdaddress[4].IN1
+rdaddress[5] => rdaddress[5].IN1
+rdaddress[6] => rdaddress[6].IN1
+rdaddress[7] => rdaddress[7].IN1
+rdaddress[8] => rdaddress[8].IN1
+rdaddress[9] => rdaddress[9].IN1
+rdaddress[10] => rdaddress[10].IN1
+rdaddress[11] => rdaddress[11].IN1
+rdaddress[12] => rdaddress[12].IN1
+rden => rden.IN1
+wraddress[0] => wraddress[0].IN1
+wraddress[1] => wraddress[1].IN1
+wraddress[2] => wraddress[2].IN1
+wraddress[3] => wraddress[3].IN1
+wraddress[4] => wraddress[4].IN1
+wraddress[5] => wraddress[5].IN1
+wraddress[6] => wraddress[6].IN1
+wraddress[7] => wraddress[7].IN1
+wraddress[8] => wraddress[8].IN1
+wraddress[9] => wraddress[9].IN1
+wraddress[10] => wraddress[10].IN1
+wraddress[11] => wraddress[11].IN1
+wraddress[12] => wraddress[12].IN1
+wren => wren.IN1
+q[0] <= altsyncram:altsyncram_component.q_b
+q[1] <= altsyncram:altsyncram_component.q_b
+q[2] <= altsyncram:altsyncram_component.q_b
+q[3] <= altsyncram:altsyncram_component.q_b
+q[4] <= altsyncram:altsyncram_component.q_b
+q[5] <= altsyncram:altsyncram_component.q_b
+q[6] <= altsyncram:altsyncram_component.q_b
+q[7] <= altsyncram:altsyncram_component.q_b
+q[8] <= altsyncram:altsyncram_component.q_b
+
+
+|ex19|processor:echo_var_delay|delay_block:del|altsyncram:altsyncram_component
+wren_a => altsyncram_nm22:auto_generated.wren_a
+rden_a => ~NO_FANOUT~
+wren_b => ~NO_FANOUT~
+rden_b => altsyncram_nm22:auto_generated.rden_b
+data_a[0] => altsyncram_nm22:auto_generated.data_a[0]
+data_a[1] => altsyncram_nm22:auto_generated.data_a[1]
+data_a[2] => altsyncram_nm22:auto_generated.data_a[2]
+data_a[3] => altsyncram_nm22:auto_generated.data_a[3]
+data_a[4] => altsyncram_nm22:auto_generated.data_a[4]
+data_a[5] => altsyncram_nm22:auto_generated.data_a[5]
+data_a[6] => altsyncram_nm22:auto_generated.data_a[6]
+data_a[7] => altsyncram_nm22:auto_generated.data_a[7]
+data_a[8] => altsyncram_nm22:auto_generated.data_a[8]
+data_b[0] => ~NO_FANOUT~
+data_b[1] => ~NO_FANOUT~
+data_b[2] => ~NO_FANOUT~
+data_b[3] => ~NO_FANOUT~
+data_b[4] => ~NO_FANOUT~
+data_b[5] => ~NO_FANOUT~
+data_b[6] => ~NO_FANOUT~
+data_b[7] => ~NO_FANOUT~
+data_b[8] => ~NO_FANOUT~
+address_a[0] => altsyncram_nm22:auto_generated.address_a[0]
+address_a[1] => altsyncram_nm22:auto_generated.address_a[1]
+address_a[2] => altsyncram_nm22:auto_generated.address_a[2]
+address_a[3] => altsyncram_nm22:auto_generated.address_a[3]
+address_a[4] => altsyncram_nm22:auto_generated.address_a[4]
+address_a[5] => altsyncram_nm22:auto_generated.address_a[5]
+address_a[6] => altsyncram_nm22:auto_generated.address_a[6]
+address_a[7] => altsyncram_nm22:auto_generated.address_a[7]
+address_a[8] => altsyncram_nm22:auto_generated.address_a[8]
+address_a[9] => altsyncram_nm22:auto_generated.address_a[9]
+address_a[10] => altsyncram_nm22:auto_generated.address_a[10]
+address_a[11] => altsyncram_nm22:auto_generated.address_a[11]
+address_a[12] => altsyncram_nm22:auto_generated.address_a[12]
+address_b[0] => altsyncram_nm22:auto_generated.address_b[0]
+address_b[1] => altsyncram_nm22:auto_generated.address_b[1]
+address_b[2] => altsyncram_nm22:auto_generated.address_b[2]
+address_b[3] => altsyncram_nm22:auto_generated.address_b[3]
+address_b[4] => altsyncram_nm22:auto_generated.address_b[4]
+address_b[5] => altsyncram_nm22:auto_generated.address_b[5]
+address_b[6] => altsyncram_nm22:auto_generated.address_b[6]
+address_b[7] => altsyncram_nm22:auto_generated.address_b[7]
+address_b[8] => altsyncram_nm22:auto_generated.address_b[8]
+address_b[9] => altsyncram_nm22:auto_generated.address_b[9]
+address_b[10] => altsyncram_nm22:auto_generated.address_b[10]
+address_b[11] => altsyncram_nm22:auto_generated.address_b[11]
+address_b[12] => altsyncram_nm22:auto_generated.address_b[12]
+addressstall_a => ~NO_FANOUT~
+addressstall_b => ~NO_FANOUT~
+clock0 => altsyncram_nm22:auto_generated.clock0
+clock1 => ~NO_FANOUT~
+clocken0 => ~NO_FANOUT~
+clocken1 => ~NO_FANOUT~
+clocken2 => ~NO_FANOUT~
+clocken3 => ~NO_FANOUT~
+aclr0 => ~NO_FANOUT~
+aclr1 => ~NO_FANOUT~
+byteena_a[0] => ~NO_FANOUT~
+byteena_b[0] => ~NO_FANOUT~
+q_a[0] <= <GND>
+q_a[1] <= <GND>
+q_a[2] <= <GND>
+q_a[3] <= <GND>
+q_a[4] <= <GND>
+q_a[5] <= <GND>
+q_a[6] <= <GND>
+q_a[7] <= <GND>
+q_a[8] <= <GND>
+q_b[0] <= altsyncram_nm22:auto_generated.q_b[0]
+q_b[1] <= altsyncram_nm22:auto_generated.q_b[1]
+q_b[2] <= altsyncram_nm22:auto_generated.q_b[2]
+q_b[3] <= altsyncram_nm22:auto_generated.q_b[3]
+q_b[4] <= altsyncram_nm22:auto_generated.q_b[4]
+q_b[5] <= altsyncram_nm22:auto_generated.q_b[5]
+q_b[6] <= altsyncram_nm22:auto_generated.q_b[6]
+q_b[7] <= altsyncram_nm22:auto_generated.q_b[7]
+q_b[8] <= altsyncram_nm22:auto_generated.q_b[8]
+eccstatus[0] <= <GND>
+eccstatus[1] <= <GND>
+eccstatus[2] <= <GND>
+
+
+|ex19|processor:echo_var_delay|delay_block:del|altsyncram:altsyncram_component|altsyncram_nm22:auto_generated
+address_a[0] => ram_block1a0.PORTAADDR
+address_a[0] => ram_block1a1.PORTAADDR
+address_a[0] => ram_block1a2.PORTAADDR
+address_a[0] => ram_block1a3.PORTAADDR
+address_a[0] => ram_block1a4.PORTAADDR
+address_a[0] => ram_block1a5.PORTAADDR
+address_a[0] => ram_block1a6.PORTAADDR
+address_a[0] => ram_block1a7.PORTAADDR
+address_a[0] => ram_block1a8.PORTAADDR
+address_a[1] => ram_block1a0.PORTAADDR1
+address_a[1] => ram_block1a1.PORTAADDR1
+address_a[1] => ram_block1a2.PORTAADDR1
+address_a[1] => ram_block1a3.PORTAADDR1
+address_a[1] => ram_block1a4.PORTAADDR1
+address_a[1] => ram_block1a5.PORTAADDR1
+address_a[1] => ram_block1a6.PORTAADDR1
+address_a[1] => ram_block1a7.PORTAADDR1
+address_a[1] => ram_block1a8.PORTAADDR1
+address_a[2] => ram_block1a0.PORTAADDR2
+address_a[2] => ram_block1a1.PORTAADDR2
+address_a[2] => ram_block1a2.PORTAADDR2
+address_a[2] => ram_block1a3.PORTAADDR2
+address_a[2] => ram_block1a4.PORTAADDR2
+address_a[2] => ram_block1a5.PORTAADDR2
+address_a[2] => ram_block1a6.PORTAADDR2
+address_a[2] => ram_block1a7.PORTAADDR2
+address_a[2] => ram_block1a8.PORTAADDR2
+address_a[3] => ram_block1a0.PORTAADDR3
+address_a[3] => ram_block1a1.PORTAADDR3
+address_a[3] => ram_block1a2.PORTAADDR3
+address_a[3] => ram_block1a3.PORTAADDR3
+address_a[3] => ram_block1a4.PORTAADDR3
+address_a[3] => ram_block1a5.PORTAADDR3
+address_a[3] => ram_block1a6.PORTAADDR3
+address_a[3] => ram_block1a7.PORTAADDR3
+address_a[3] => ram_block1a8.PORTAADDR3
+address_a[4] => ram_block1a0.PORTAADDR4
+address_a[4] => ram_block1a1.PORTAADDR4
+address_a[4] => ram_block1a2.PORTAADDR4
+address_a[4] => ram_block1a3.PORTAADDR4
+address_a[4] => ram_block1a4.PORTAADDR4
+address_a[4] => ram_block1a5.PORTAADDR4
+address_a[4] => ram_block1a6.PORTAADDR4
+address_a[4] => ram_block1a7.PORTAADDR4
+address_a[4] => ram_block1a8.PORTAADDR4
+address_a[5] => ram_block1a0.PORTAADDR5
+address_a[5] => ram_block1a1.PORTAADDR5
+address_a[5] => ram_block1a2.PORTAADDR5
+address_a[5] => ram_block1a3.PORTAADDR5
+address_a[5] => ram_block1a4.PORTAADDR5
+address_a[5] => ram_block1a5.PORTAADDR5
+address_a[5] => ram_block1a6.PORTAADDR5
+address_a[5] => ram_block1a7.PORTAADDR5
+address_a[5] => ram_block1a8.PORTAADDR5
+address_a[6] => ram_block1a0.PORTAADDR6
+address_a[6] => ram_block1a1.PORTAADDR6
+address_a[6] => ram_block1a2.PORTAADDR6
+address_a[6] => ram_block1a3.PORTAADDR6
+address_a[6] => ram_block1a4.PORTAADDR6
+address_a[6] => ram_block1a5.PORTAADDR6
+address_a[6] => ram_block1a6.PORTAADDR6
+address_a[6] => ram_block1a7.PORTAADDR6
+address_a[6] => ram_block1a8.PORTAADDR6
+address_a[7] => ram_block1a0.PORTAADDR7
+address_a[7] => ram_block1a1.PORTAADDR7
+address_a[7] => ram_block1a2.PORTAADDR7
+address_a[7] => ram_block1a3.PORTAADDR7
+address_a[7] => ram_block1a4.PORTAADDR7
+address_a[7] => ram_block1a5.PORTAADDR7
+address_a[7] => ram_block1a6.PORTAADDR7
+address_a[7] => ram_block1a7.PORTAADDR7
+address_a[7] => ram_block1a8.PORTAADDR7
+address_a[8] => ram_block1a0.PORTAADDR8
+address_a[8] => ram_block1a1.PORTAADDR8
+address_a[8] => ram_block1a2.PORTAADDR8
+address_a[8] => ram_block1a3.PORTAADDR8
+address_a[8] => ram_block1a4.PORTAADDR8
+address_a[8] => ram_block1a5.PORTAADDR8
+address_a[8] => ram_block1a6.PORTAADDR8
+address_a[8] => ram_block1a7.PORTAADDR8
+address_a[8] => ram_block1a8.PORTAADDR8
+address_a[9] => ram_block1a0.PORTAADDR9
+address_a[9] => ram_block1a1.PORTAADDR9
+address_a[9] => ram_block1a2.PORTAADDR9
+address_a[9] => ram_block1a3.PORTAADDR9
+address_a[9] => ram_block1a4.PORTAADDR9
+address_a[9] => ram_block1a5.PORTAADDR9
+address_a[9] => ram_block1a6.PORTAADDR9
+address_a[9] => ram_block1a7.PORTAADDR9
+address_a[9] => ram_block1a8.PORTAADDR9
+address_a[10] => ram_block1a0.PORTAADDR10
+address_a[10] => ram_block1a1.PORTAADDR10
+address_a[10] => ram_block1a2.PORTAADDR10
+address_a[10] => ram_block1a3.PORTAADDR10
+address_a[10] => ram_block1a4.PORTAADDR10
+address_a[10] => ram_block1a5.PORTAADDR10
+address_a[10] => ram_block1a6.PORTAADDR10
+address_a[10] => ram_block1a7.PORTAADDR10
+address_a[10] => ram_block1a8.PORTAADDR10
+address_a[11] => ram_block1a0.PORTAADDR11
+address_a[11] => ram_block1a1.PORTAADDR11
+address_a[11] => ram_block1a2.PORTAADDR11
+address_a[11] => ram_block1a3.PORTAADDR11
+address_a[11] => ram_block1a4.PORTAADDR11
+address_a[11] => ram_block1a5.PORTAADDR11
+address_a[11] => ram_block1a6.PORTAADDR11
+address_a[11] => ram_block1a7.PORTAADDR11
+address_a[11] => ram_block1a8.PORTAADDR11
+address_a[12] => ram_block1a0.PORTAADDR12
+address_a[12] => ram_block1a1.PORTAADDR12
+address_a[12] => ram_block1a2.PORTAADDR12
+address_a[12] => ram_block1a3.PORTAADDR12
+address_a[12] => ram_block1a4.PORTAADDR12
+address_a[12] => ram_block1a5.PORTAADDR12
+address_a[12] => ram_block1a6.PORTAADDR12
+address_a[12] => ram_block1a7.PORTAADDR12
+address_a[12] => ram_block1a8.PORTAADDR12
+address_b[0] => ram_block1a0.PORTBADDR
+address_b[0] => ram_block1a1.PORTBADDR
+address_b[0] => ram_block1a2.PORTBADDR
+address_b[0] => ram_block1a3.PORTBADDR
+address_b[0] => ram_block1a4.PORTBADDR
+address_b[0] => ram_block1a5.PORTBADDR
+address_b[0] => ram_block1a6.PORTBADDR
+address_b[0] => ram_block1a7.PORTBADDR
+address_b[0] => ram_block1a8.PORTBADDR
+address_b[1] => ram_block1a0.PORTBADDR1
+address_b[1] => ram_block1a1.PORTBADDR1
+address_b[1] => ram_block1a2.PORTBADDR1
+address_b[1] => ram_block1a3.PORTBADDR1
+address_b[1] => ram_block1a4.PORTBADDR1
+address_b[1] => ram_block1a5.PORTBADDR1
+address_b[1] => ram_block1a6.PORTBADDR1
+address_b[1] => ram_block1a7.PORTBADDR1
+address_b[1] => ram_block1a8.PORTBADDR1
+address_b[2] => ram_block1a0.PORTBADDR2
+address_b[2] => ram_block1a1.PORTBADDR2
+address_b[2] => ram_block1a2.PORTBADDR2
+address_b[2] => ram_block1a3.PORTBADDR2
+address_b[2] => ram_block1a4.PORTBADDR2
+address_b[2] => ram_block1a5.PORTBADDR2
+address_b[2] => ram_block1a6.PORTBADDR2
+address_b[2] => ram_block1a7.PORTBADDR2
+address_b[2] => ram_block1a8.PORTBADDR2
+address_b[3] => ram_block1a0.PORTBADDR3
+address_b[3] => ram_block1a1.PORTBADDR3
+address_b[3] => ram_block1a2.PORTBADDR3
+address_b[3] => ram_block1a3.PORTBADDR3
+address_b[3] => ram_block1a4.PORTBADDR3
+address_b[3] => ram_block1a5.PORTBADDR3
+address_b[3] => ram_block1a6.PORTBADDR3
+address_b[3] => ram_block1a7.PORTBADDR3
+address_b[3] => ram_block1a8.PORTBADDR3
+address_b[4] => ram_block1a0.PORTBADDR4
+address_b[4] => ram_block1a1.PORTBADDR4
+address_b[4] => ram_block1a2.PORTBADDR4
+address_b[4] => ram_block1a3.PORTBADDR4
+address_b[4] => ram_block1a4.PORTBADDR4
+address_b[4] => ram_block1a5.PORTBADDR4
+address_b[4] => ram_block1a6.PORTBADDR4
+address_b[4] => ram_block1a7.PORTBADDR4
+address_b[4] => ram_block1a8.PORTBADDR4
+address_b[5] => ram_block1a0.PORTBADDR5
+address_b[5] => ram_block1a1.PORTBADDR5
+address_b[5] => ram_block1a2.PORTBADDR5
+address_b[5] => ram_block1a3.PORTBADDR5
+address_b[5] => ram_block1a4.PORTBADDR5
+address_b[5] => ram_block1a5.PORTBADDR5
+address_b[5] => ram_block1a6.PORTBADDR5
+address_b[5] => ram_block1a7.PORTBADDR5
+address_b[5] => ram_block1a8.PORTBADDR5
+address_b[6] => ram_block1a0.PORTBADDR6
+address_b[6] => ram_block1a1.PORTBADDR6
+address_b[6] => ram_block1a2.PORTBADDR6
+address_b[6] => ram_block1a3.PORTBADDR6
+address_b[6] => ram_block1a4.PORTBADDR6
+address_b[6] => ram_block1a5.PORTBADDR6
+address_b[6] => ram_block1a6.PORTBADDR6
+address_b[6] => ram_block1a7.PORTBADDR6
+address_b[6] => ram_block1a8.PORTBADDR6
+address_b[7] => ram_block1a0.PORTBADDR7
+address_b[7] => ram_block1a1.PORTBADDR7
+address_b[7] => ram_block1a2.PORTBADDR7
+address_b[7] => ram_block1a3.PORTBADDR7
+address_b[7] => ram_block1a4.PORTBADDR7
+address_b[7] => ram_block1a5.PORTBADDR7
+address_b[7] => ram_block1a6.PORTBADDR7
+address_b[7] => ram_block1a7.PORTBADDR7
+address_b[7] => ram_block1a8.PORTBADDR7
+address_b[8] => ram_block1a0.PORTBADDR8
+address_b[8] => ram_block1a1.PORTBADDR8
+address_b[8] => ram_block1a2.PORTBADDR8
+address_b[8] => ram_block1a3.PORTBADDR8
+address_b[8] => ram_block1a4.PORTBADDR8
+address_b[8] => ram_block1a5.PORTBADDR8
+address_b[8] => ram_block1a6.PORTBADDR8
+address_b[8] => ram_block1a7.PORTBADDR8
+address_b[8] => ram_block1a8.PORTBADDR8
+address_b[9] => ram_block1a0.PORTBADDR9
+address_b[9] => ram_block1a1.PORTBADDR9
+address_b[9] => ram_block1a2.PORTBADDR9
+address_b[9] => ram_block1a3.PORTBADDR9
+address_b[9] => ram_block1a4.PORTBADDR9
+address_b[9] => ram_block1a5.PORTBADDR9
+address_b[9] => ram_block1a6.PORTBADDR9
+address_b[9] => ram_block1a7.PORTBADDR9
+address_b[9] => ram_block1a8.PORTBADDR9
+address_b[10] => ram_block1a0.PORTBADDR10
+address_b[10] => ram_block1a1.PORTBADDR10
+address_b[10] => ram_block1a2.PORTBADDR10
+address_b[10] => ram_block1a3.PORTBADDR10
+address_b[10] => ram_block1a4.PORTBADDR10
+address_b[10] => ram_block1a5.PORTBADDR10
+address_b[10] => ram_block1a6.PORTBADDR10
+address_b[10] => ram_block1a7.PORTBADDR10
+address_b[10] => ram_block1a8.PORTBADDR10
+address_b[11] => ram_block1a0.PORTBADDR11
+address_b[11] => ram_block1a1.PORTBADDR11
+address_b[11] => ram_block1a2.PORTBADDR11
+address_b[11] => ram_block1a3.PORTBADDR11
+address_b[11] => ram_block1a4.PORTBADDR11
+address_b[11] => ram_block1a5.PORTBADDR11
+address_b[11] => ram_block1a6.PORTBADDR11
+address_b[11] => ram_block1a7.PORTBADDR11
+address_b[11] => ram_block1a8.PORTBADDR11
+address_b[12] => ram_block1a0.PORTBADDR12
+address_b[12] => ram_block1a1.PORTBADDR12
+address_b[12] => ram_block1a2.PORTBADDR12
+address_b[12] => ram_block1a3.PORTBADDR12
+address_b[12] => ram_block1a4.PORTBADDR12
+address_b[12] => ram_block1a5.PORTBADDR12
+address_b[12] => ram_block1a6.PORTBADDR12
+address_b[12] => ram_block1a7.PORTBADDR12
+address_b[12] => ram_block1a8.PORTBADDR12
+clock0 => ram_block1a0.CLK0
+clock0 => ram_block1a0.CLK1
+clock0 => ram_block1a1.CLK0
+clock0 => ram_block1a1.CLK1
+clock0 => ram_block1a2.CLK0
+clock0 => ram_block1a2.CLK1
+clock0 => ram_block1a3.CLK0
+clock0 => ram_block1a3.CLK1
+clock0 => ram_block1a4.CLK0
+clock0 => ram_block1a4.CLK1
+clock0 => ram_block1a5.CLK0
+clock0 => ram_block1a5.CLK1
+clock0 => ram_block1a6.CLK0
+clock0 => ram_block1a6.CLK1
+clock0 => ram_block1a7.CLK0
+clock0 => ram_block1a7.CLK1
+clock0 => ram_block1a8.CLK0
+clock0 => ram_block1a8.CLK1
+data_a[0] => ram_block1a0.PORTADATAIN
+data_a[1] => ram_block1a1.PORTADATAIN
+data_a[2] => ram_block1a2.PORTADATAIN
+data_a[3] => ram_block1a3.PORTADATAIN
+data_a[4] => ram_block1a4.PORTADATAIN
+data_a[5] => ram_block1a5.PORTADATAIN
+data_a[6] => ram_block1a6.PORTADATAIN
+data_a[7] => ram_block1a7.PORTADATAIN
+data_a[8] => ram_block1a8.PORTADATAIN
+q_b[0] <= ram_block1a0.PORTBDATAOUT
+q_b[1] <= ram_block1a1.PORTBDATAOUT
+q_b[2] <= ram_block1a2.PORTBDATAOUT
+q_b[3] <= ram_block1a3.PORTBDATAOUT
+q_b[4] <= ram_block1a4.PORTBDATAOUT
+q_b[5] <= ram_block1a5.PORTBDATAOUT
+q_b[6] <= ram_block1a6.PORTBDATAOUT
+q_b[7] <= ram_block1a7.PORTBDATAOUT
+q_b[8] <= ram_block1a8.PORTBDATAOUT
+rden_b => ram_block1a0.ENA1
+rden_b => ram_block1a1.ENA1
+rden_b => ram_block1a2.ENA1
+rden_b => ram_block1a3.ENA1
+rden_b => ram_block1a4.ENA1
+rden_b => ram_block1a5.ENA1
+rden_b => ram_block1a6.ENA1
+rden_b => ram_block1a7.ENA1
+rden_b => ram_block1a8.ENA1
+wren_a => ram_block1a0.PORTAWE
+wren_a => ram_block1a0.ENA0
+wren_a => ram_block1a1.PORTAWE
+wren_a => ram_block1a1.ENA0
+wren_a => ram_block1a2.PORTAWE
+wren_a => ram_block1a2.ENA0
+wren_a => ram_block1a3.PORTAWE
+wren_a => ram_block1a3.ENA0
+wren_a => ram_block1a4.PORTAWE
+wren_a => ram_block1a4.ENA0
+wren_a => ram_block1a5.PORTAWE
+wren_a => ram_block1a5.ENA0
+wren_a => ram_block1a6.PORTAWE
+wren_a => ram_block1a6.ENA0
+wren_a => ram_block1a7.PORTAWE
+wren_a => ram_block1a7.ENA0
+wren_a => ram_block1a8.PORTAWE
+wren_a => ram_block1a8.ENA0
+
+
+|ex19|processor:echo_var_delay|div_by_2:comb_6
+in[0] => ~NO_FANOUT~
+in[1] => out[0].DATAIN
+in[2] => out[1].DATAIN
+in[3] => out[2].DATAIN
+in[4] => out[3].DATAIN
+in[5] => out[4].DATAIN
+in[6] => out[5].DATAIN
+in[7] => out[6].DATAIN
+in[8] => out[7].DATAIN
+in[9] => out[8].DATAIN
+in[9] => out[9].DATAIN
+out[0] <= in[1].DB_MAX_OUTPUT_PORT_TYPE
+out[1] <= in[2].DB_MAX_OUTPUT_PORT_TYPE
+out[2] <= in[3].DB_MAX_OUTPUT_PORT_TYPE
+out[3] <= in[4].DB_MAX_OUTPUT_PORT_TYPE
+out[4] <= in[5].DB_MAX_OUTPUT_PORT_TYPE
+out[5] <= in[6].DB_MAX_OUTPUT_PORT_TYPE
+out[6] <= in[7].DB_MAX_OUTPUT_PORT_TYPE
+out[7] <= in[8].DB_MAX_OUTPUT_PORT_TYPE
+out[8] <= in[9].DB_MAX_OUTPUT_PORT_TYPE
+out[9] <= in[9].DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666
+dataa[0] => dataa[0].IN1
+dataa[1] => dataa[1].IN1
+dataa[2] => dataa[2].IN1
+dataa[3] => dataa[3].IN1
+dataa[4] => dataa[4].IN1
+dataa[5] => dataa[5].IN1
+dataa[6] => dataa[6].IN1
+dataa[7] => dataa[7].IN1
+dataa[8] => dataa[8].IN1
+result[0] <= lpm_mult:lpm_mult_component.result
+result[1] <= lpm_mult:lpm_mult_component.result
+result[2] <= lpm_mult:lpm_mult_component.result
+result[3] <= lpm_mult:lpm_mult_component.result
+result[4] <= lpm_mult:lpm_mult_component.result
+result[5] <= lpm_mult:lpm_mult_component.result
+result[6] <= lpm_mult:lpm_mult_component.result
+result[7] <= lpm_mult:lpm_mult_component.result
+result[8] <= lpm_mult:lpm_mult_component.result
+result[9] <= lpm_mult:lpm_mult_component.result
+result[10] <= lpm_mult:lpm_mult_component.result
+result[11] <= lpm_mult:lpm_mult_component.result
+result[12] <= lpm_mult:lpm_mult_component.result
+result[13] <= lpm_mult:lpm_mult_component.result
+result[14] <= lpm_mult:lpm_mult_component.result
+result[15] <= lpm_mult:lpm_mult_component.result
+result[16] <= lpm_mult:lpm_mult_component.result
+result[17] <= lpm_mult:lpm_mult_component.result
+result[18] <= lpm_mult:lpm_mult_component.result
+result[19] <= lpm_mult:lpm_mult_component.result
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666|lpm_mult:lpm_mult_component
+dataa[0] => multcore:mult_core.dataa[0]
+dataa[1] => multcore:mult_core.dataa[1]
+dataa[2] => multcore:mult_core.dataa[2]
+dataa[3] => multcore:mult_core.dataa[3]
+dataa[4] => multcore:mult_core.dataa[4]
+dataa[5] => multcore:mult_core.dataa[5]
+dataa[6] => multcore:mult_core.dataa[6]
+dataa[7] => multcore:mult_core.dataa[7]
+dataa[8] => multcore:mult_core.dataa[8]
+datab[0] => multcore:mult_core.datab[0]
+datab[1] => multcore:mult_core.datab[1]
+datab[2] => multcore:mult_core.datab[2]
+datab[3] => multcore:mult_core.datab[3]
+datab[4] => multcore:mult_core.datab[4]
+datab[5] => multcore:mult_core.datab[5]
+datab[6] => multcore:mult_core.datab[6]
+datab[7] => multcore:mult_core.datab[7]
+datab[8] => multcore:mult_core.datab[8]
+datab[9] => multcore:mult_core.datab[9]
+datab[10] => multcore:mult_core.datab[10]
+sum[0] => ~NO_FANOUT~
+aclr => ~NO_FANOUT~
+sclr => ~NO_FANOUT~
+clock => ~NO_FANOUT~
+clken => ~NO_FANOUT~
+result[0] <= altshift:external_latency_ffs.result[0]
+result[1] <= altshift:external_latency_ffs.result[1]
+result[2] <= altshift:external_latency_ffs.result[2]
+result[3] <= altshift:external_latency_ffs.result[3]
+result[4] <= altshift:external_latency_ffs.result[4]
+result[5] <= altshift:external_latency_ffs.result[5]
+result[6] <= altshift:external_latency_ffs.result[6]
+result[7] <= altshift:external_latency_ffs.result[7]
+result[8] <= altshift:external_latency_ffs.result[8]
+result[9] <= altshift:external_latency_ffs.result[9]
+result[10] <= altshift:external_latency_ffs.result[10]
+result[11] <= altshift:external_latency_ffs.result[11]
+result[12] <= altshift:external_latency_ffs.result[12]
+result[13] <= altshift:external_latency_ffs.result[13]
+result[14] <= altshift:external_latency_ffs.result[14]
+result[15] <= altshift:external_latency_ffs.result[15]
+result[16] <= altshift:external_latency_ffs.result[16]
+result[17] <= altshift:external_latency_ffs.result[17]
+result[18] <= altshift:external_latency_ffs.result[18]
+result[19] <= altshift:external_latency_ffs.result[19]
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666|lpm_mult:lpm_mult_component|multcore:mult_core
+dataa[0] => _.IN0
+dataa[0] => _.IN3
+dataa[0] => _.IN0
+dataa[0] => _.IN3
+dataa[0] => _.IN0
+dataa[0] => _.IN3
+dataa[0] => _.IN0
+dataa[0] => _.IN3
+dataa[0] => _.IN0
+dataa[0] => _.IN3
+dataa[0] => _.IN0
+dataa[0] => _.IN3
+dataa[0] => _.IN0
+dataa[0] => _.IN3
+dataa[0] => _.IN0
+dataa[0] => _.IN3
+dataa[1] => _.IN0
+dataa[1] => _.IN0
+dataa[1] => _.IN2
+dataa[1] => _.IN2
+dataa[1] => _.IN0
+dataa[1] => _.IN0
+dataa[1] => _.IN2
+dataa[1] => _.IN2
+dataa[1] => _.IN0
+dataa[1] => _.IN0
+dataa[1] => _.IN2
+dataa[1] => _.IN2
+dataa[1] => _.IN0
+dataa[1] => _.IN0
+dataa[1] => _.IN2
+dataa[1] => _.IN2
+dataa[2] => _.IN0
+dataa[2] => _.IN0
+dataa[2] => _.IN0
+dataa[2] => _.IN0
+dataa[2] => _.IN1
+dataa[2] => _.IN1
+dataa[2] => _.IN1
+dataa[2] => _.IN1
+dataa[2] => _.IN0
+dataa[2] => _.IN0
+dataa[2] => _.IN0
+dataa[2] => _.IN0
+dataa[2] => _.IN1
+dataa[2] => _.IN1
+dataa[2] => _.IN1
+dataa[2] => _.IN1
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[3] => _.IN0
+dataa[4] => _.IN0
+dataa[4] => _.IN3
+dataa[4] => _.IN0
+dataa[4] => _.IN3
+dataa[4] => _.IN0
+dataa[4] => _.IN3
+dataa[4] => _.IN0
+dataa[4] => _.IN3
+dataa[4] => _.IN0
+dataa[4] => _.IN3
+dataa[4] => _.IN0
+dataa[4] => _.IN3
+dataa[4] => _.IN0
+dataa[4] => _.IN3
+dataa[4] => _.IN0
+dataa[4] => _.IN3
+dataa[5] => _.IN0
+dataa[5] => _.IN0
+dataa[5] => _.IN2
+dataa[5] => _.IN2
+dataa[5] => _.IN0
+dataa[5] => _.IN0
+dataa[5] => _.IN2
+dataa[5] => _.IN2
+dataa[5] => _.IN0
+dataa[5] => _.IN0
+dataa[5] => _.IN2
+dataa[5] => _.IN2
+dataa[5] => _.IN0
+dataa[5] => _.IN0
+dataa[5] => _.IN2
+dataa[5] => _.IN2
+dataa[6] => _.IN0
+dataa[6] => _.IN0
+dataa[6] => _.IN0
+dataa[6] => _.IN0
+dataa[6] => _.IN1
+dataa[6] => _.IN1
+dataa[6] => _.IN1
+dataa[6] => _.IN1
+dataa[6] => _.IN0
+dataa[6] => _.IN0
+dataa[6] => _.IN0
+dataa[6] => _.IN0
+dataa[6] => _.IN1
+dataa[6] => _.IN1
+dataa[6] => _.IN1
+dataa[6] => _.IN1
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[7] => _.IN0
+dataa[8] => ina_reg_clkd[0].IN0
+datab[0] => op_1.IN28
+datab[0] => op_2.IN29
+datab[0] => op_4.IN29
+datab[0] => op_5.IN29
+datab[0] => op_6.IN29
+datab[0] => op_7.IN29
+datab[0] => op_8.IN29
+datab[0] => op_9.IN29
+datab[0] => op_10.IN29
+datab[0] => op_11.IN29
+datab[0] => romout[0][0].IN1
+datab[0] => romout[1][0].IN1
+datab[0] => op_1.IN27
+datab[0] => op_3.IN27
+datab[0] => romout[0][1].IN1
+datab[0] => romout[1][1].IN1
+datab[0] => op_2.IN24
+datab[0] => op_3.IN24
+datab[0] => romout[0][2].IN1
+datab[0] => romout[1][2].IN1
+datab[0] => op_5.IN22
+datab[0] => romout[0][3].IN1
+datab[0] => romout[1][3].IN1
+datab[0] => romout[2][0].IN1
+datab[0] => romout[2][1].IN1
+datab[0] => romout[2][2].IN1
+datab[0] => romout[2][3].IN1
+datab[1] => op_1.IN26
+datab[1] => op_2.IN27
+datab[1] => op_4.IN27
+datab[1] => op_5.IN27
+datab[1] => op_6.IN27
+datab[1] => op_7.IN27
+datab[1] => op_8.IN27
+datab[1] => op_9.IN27
+datab[1] => op_10.IN27
+datab[1] => op_11.IN27
+datab[1] => romout[0][1].IN1
+datab[1] => romout[1][1].IN1
+datab[1] => op_1.IN25
+datab[1] => op_3.IN25
+datab[1] => romout[0][2].IN1
+datab[1] => romout[1][2].IN1
+datab[1] => op_2.IN22
+datab[1] => op_3.IN22
+datab[1] => romout[0][3].IN1
+datab[1] => romout[1][3].IN1
+datab[1] => op_5.IN20
+datab[1] => romout[0][4].IN1
+datab[1] => romout[1][4].IN1
+datab[1] => romout[2][1].IN1
+datab[1] => romout[2][2].IN1
+datab[1] => romout[2][3].IN1
+datab[1] => romout[2][4].IN1
+datab[2] => op_1.IN24
+datab[2] => op_2.IN25
+datab[2] => op_4.IN25
+datab[2] => op_5.IN25
+datab[2] => op_6.IN25
+datab[2] => op_7.IN25
+datab[2] => op_8.IN25
+datab[2] => op_9.IN25
+datab[2] => op_10.IN25
+datab[2] => op_11.IN25
+datab[2] => romout[0][2].IN1
+datab[2] => romout[1][2].IN1
+datab[2] => op_1.IN23
+datab[2] => op_3.IN23
+datab[2] => romout[0][3].IN1
+datab[2] => romout[1][3].IN1
+datab[2] => op_2.IN20
+datab[2] => op_3.IN20
+datab[2] => romout[0][4].IN1
+datab[2] => romout[1][4].IN1
+datab[2] => op_5.IN18
+datab[2] => romout[0][5].IN1
+datab[2] => romout[1][5].IN1
+datab[2] => romout[2][2].IN1
+datab[2] => romout[2][3].IN1
+datab[2] => romout[2][4].IN1
+datab[2] => romout[2][5].IN1
+datab[3] => op_1.IN22
+datab[3] => op_2.IN23
+datab[3] => op_4.IN23
+datab[3] => op_5.IN23
+datab[3] => op_6.IN23
+datab[3] => op_7.IN23
+datab[3] => op_8.IN23
+datab[3] => op_9.IN23
+datab[3] => op_10.IN23
+datab[3] => op_11.IN23
+datab[3] => romout[0][3].IN1
+datab[3] => romout[1][3].IN1
+datab[3] => op_1.IN21
+datab[3] => op_3.IN21
+datab[3] => romout[0][4].IN1
+datab[3] => romout[1][4].IN1
+datab[3] => op_2.IN18
+datab[3] => op_3.IN18
+datab[3] => romout[0][5].IN1
+datab[3] => romout[1][5].IN1
+datab[3] => op_5.IN16
+datab[3] => romout[0][6].IN1
+datab[3] => romout[1][6].IN1
+datab[3] => romout[2][3].IN1
+datab[3] => romout[2][4].IN1
+datab[3] => romout[2][5].IN1
+datab[3] => romout[2][6].IN1
+datab[4] => op_1.IN20
+datab[4] => op_2.IN21
+datab[4] => op_4.IN21
+datab[4] => op_5.IN21
+datab[4] => op_6.IN21
+datab[4] => op_7.IN21
+datab[4] => op_8.IN21
+datab[4] => op_9.IN21
+datab[4] => op_10.IN21
+datab[4] => op_11.IN21
+datab[4] => romout[0][4].IN1
+datab[4] => romout[1][4].IN1
+datab[4] => op_1.IN19
+datab[4] => op_3.IN19
+datab[4] => romout[0][5].IN1
+datab[4] => romout[1][5].IN1
+datab[4] => op_2.IN16
+datab[4] => op_3.IN16
+datab[4] => romout[0][6].IN1
+datab[4] => romout[1][6].IN1
+datab[4] => op_5.IN14
+datab[4] => romout[0][7].IN1
+datab[4] => romout[1][7].IN1
+datab[4] => romout[2][4].IN1
+datab[4] => romout[2][5].IN1
+datab[4] => romout[2][6].IN1
+datab[4] => romout[2][7].IN1
+datab[5] => op_1.IN18
+datab[5] => op_2.IN19
+datab[5] => op_4.IN19
+datab[5] => op_5.IN19
+datab[5] => op_6.IN19
+datab[5] => op_7.IN19
+datab[5] => op_8.IN19
+datab[5] => op_9.IN19
+datab[5] => op_10.IN19
+datab[5] => op_11.IN19
+datab[5] => romout[0][5].IN1
+datab[5] => romout[1][5].IN1
+datab[5] => op_1.IN17
+datab[5] => op_3.IN17
+datab[5] => romout[0][6].IN1
+datab[5] => romout[1][6].IN1
+datab[5] => op_2.IN14
+datab[5] => op_3.IN14
+datab[5] => romout[0][7].IN1
+datab[5] => romout[1][7].IN1
+datab[5] => op_5.IN12
+datab[5] => romout[0][8].IN1
+datab[5] => romout[1][8].IN1
+datab[5] => romout[2][5].IN1
+datab[5] => romout[2][6].IN1
+datab[5] => romout[2][7].IN1
+datab[5] => romout[2][8].IN1
+datab[6] => op_1.IN16
+datab[6] => op_2.IN17
+datab[6] => op_4.IN17
+datab[6] => op_5.IN17
+datab[6] => op_6.IN17
+datab[6] => op_7.IN17
+datab[6] => op_8.IN17
+datab[6] => op_9.IN17
+datab[6] => op_10.IN17
+datab[6] => op_11.IN17
+datab[6] => romout[0][6].IN1
+datab[6] => romout[1][6].IN1
+datab[6] => op_1.IN15
+datab[6] => op_3.IN15
+datab[6] => romout[0][7].IN1
+datab[6] => romout[1][7].IN1
+datab[6] => op_2.IN12
+datab[6] => op_3.IN12
+datab[6] => romout[0][8].IN1
+datab[6] => romout[1][8].IN1
+datab[6] => op_5.IN10
+datab[6] => romout[0][9].IN1
+datab[6] => romout[1][9].IN1
+datab[6] => romout[2][6].IN1
+datab[6] => romout[2][7].IN1
+datab[6] => romout[2][8].IN1
+datab[6] => romout[2][9].IN1
+datab[7] => op_1.IN14
+datab[7] => op_2.IN15
+datab[7] => op_4.IN15
+datab[7] => op_5.IN15
+datab[7] => op_6.IN15
+datab[7] => op_7.IN15
+datab[7] => op_8.IN15
+datab[7] => op_9.IN15
+datab[7] => op_10.IN15
+datab[7] => op_11.IN15
+datab[7] => romout[0][7].IN1
+datab[7] => romout[1][7].IN1
+datab[7] => op_1.IN13
+datab[7] => op_3.IN13
+datab[7] => romout[0][8].IN1
+datab[7] => romout[1][8].IN1
+datab[7] => op_2.IN10
+datab[7] => op_3.IN10
+datab[7] => romout[0][9].IN1
+datab[7] => romout[1][9].IN1
+datab[7] => op_5.IN8
+datab[7] => romout[0][10].IN1
+datab[7] => romout[1][10].IN1
+datab[7] => romout[2][7].IN1
+datab[7] => romout[2][8].IN1
+datab[7] => romout[2][9].IN1
+datab[7] => romout[2][10].IN1
+datab[8] => op_1.IN12
+datab[8] => op_2.IN13
+datab[8] => op_4.IN13
+datab[8] => op_5.IN13
+datab[8] => op_6.IN13
+datab[8] => op_7.IN13
+datab[8] => op_8.IN13
+datab[8] => op_9.IN13
+datab[8] => op_10.IN13
+datab[8] => op_11.IN13
+datab[8] => romout[0][8].IN1
+datab[8] => romout[1][8].IN1
+datab[8] => op_1.IN11
+datab[8] => op_3.IN11
+datab[8] => romout[0][9].IN1
+datab[8] => romout[1][9].IN1
+datab[8] => op_2.IN8
+datab[8] => op_3.IN8
+datab[8] => romout[0][10].IN1
+datab[8] => romout[1][10].IN1
+datab[8] => op_5.IN6
+datab[8] => romout[0][11].IN1
+datab[8] => romout[1][11].IN1
+datab[8] => romout[2][8].IN1
+datab[8] => romout[2][9].IN1
+datab[8] => romout[2][10].IN1
+datab[8] => romout[2][11].IN1
+datab[9] => op_1.IN10
+datab[9] => op_2.IN11
+datab[9] => op_4.IN11
+datab[9] => op_5.IN11
+datab[9] => op_6.IN11
+datab[9] => op_7.IN11
+datab[9] => op_8.IN11
+datab[9] => op_9.IN11
+datab[9] => op_10.IN11
+datab[9] => op_11.IN11
+datab[9] => romout[0][9].IN1
+datab[9] => romout[1][9].IN1
+datab[9] => op_1.IN9
+datab[9] => op_3.IN9
+datab[9] => romout[0][10].IN1
+datab[9] => romout[1][10].IN1
+datab[9] => op_2.IN6
+datab[9] => op_3.IN6
+datab[9] => romout[0][11].IN1
+datab[9] => romout[1][11].IN1
+datab[9] => op_5.IN4
+datab[9] => romout[0][12].IN1
+datab[9] => romout[1][12].IN1
+datab[9] => romout[2][9].IN1
+datab[9] => romout[2][10].IN1
+datab[9] => romout[2][11].IN1
+datab[9] => romout[2][12].IN1
+datab[10] => op_1.IN8
+datab[10] => op_2.IN9
+datab[10] => op_4.IN9
+datab[10] => op_5.IN9
+datab[10] => op_6.IN9
+datab[10] => op_7.IN9
+datab[10] => op_8.IN9
+datab[10] => op_9.IN9
+datab[10] => op_10.IN9
+datab[10] => op_11.IN9
+datab[10] => romout[0][10].IN1
+datab[10] => romout[1][10].IN1
+datab[10] => op_1.IN7
+datab[10] => op_3.IN7
+datab[10] => romout[0][11].IN1
+datab[10] => romout[1][11].IN1
+datab[10] => op_2.IN4
+datab[10] => op_3.IN4
+datab[10] => romout[0][12].IN1
+datab[10] => romout[1][12].IN1
+datab[10] => op_5.IN2
+datab[10] => romout[0][13].IN1
+datab[10] => romout[1][13].IN1
+datab[10] => romout[2][10].IN1
+datab[10] => romout[2][11].IN1
+datab[10] => romout[2][12].IN1
+datab[10] => romout[2][13].IN1
+clock => ~NO_FANOUT~
+aclr => ~NO_FANOUT~
+clken => ~NO_FANOUT~
+result[0] <= mpar_add:padder.result[0]
+result[1] <= mpar_add:padder.result[1]
+result[2] <= mpar_add:padder.result[2]
+result[3] <= mpar_add:padder.result[3]
+result[4] <= mpar_add:padder.result[4]
+result[5] <= mpar_add:padder.result[5]
+result[6] <= mpar_add:padder.result[6]
+result[7] <= mpar_add:padder.result[7]
+result[8] <= mpar_add:padder.result[8]
+result[9] <= mpar_add:padder.result[9]
+result[10] <= mpar_add:padder.result[10]
+result[11] <= mpar_add:padder.result[11]
+result[12] <= mpar_add:padder.result[12]
+result[13] <= mpar_add:padder.result[13]
+result[14] <= mpar_add:padder.result[14]
+result[15] <= mpar_add:padder.result[15]
+result[16] <= mpar_add:padder.result[16]
+result[17] <= mpar_add:padder.result[17]
+result[18] <= mpar_add:padder.result[18]
+result[19] <= mpar_add:padder.result[19]
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder
+data[0][0] => mpar_add:sub_par_add.data[0][0]
+data[0][1] => mpar_add:sub_par_add.data[0][1]
+data[0][2] => mpar_add:sub_par_add.data[0][2]
+data[0][3] => mpar_add:sub_par_add.data[0][3]
+data[0][4] => lpm_add_sub:adder[0].dataa[0]
+data[0][5] => lpm_add_sub:adder[0].dataa[1]
+data[0][6] => lpm_add_sub:adder[0].dataa[2]
+data[0][7] => lpm_add_sub:adder[0].dataa[3]
+data[0][8] => lpm_add_sub:adder[0].dataa[4]
+data[0][9] => lpm_add_sub:adder[0].dataa[5]
+data[0][10] => lpm_add_sub:adder[0].dataa[6]
+data[0][11] => lpm_add_sub:adder[0].dataa[7]
+data[0][12] => lpm_add_sub:adder[0].dataa[8]
+data[0][13] => lpm_add_sub:adder[0].dataa[9]
+data[0][14] => lpm_add_sub:adder[0].dataa[10]
+data[1][0] => lpm_add_sub:adder[0].datab[0]
+data[1][1] => lpm_add_sub:adder[0].datab[1]
+data[1][2] => lpm_add_sub:adder[0].datab[2]
+data[1][3] => lpm_add_sub:adder[0].datab[3]
+data[1][4] => lpm_add_sub:adder[0].datab[4]
+data[1][5] => lpm_add_sub:adder[0].datab[5]
+data[1][6] => lpm_add_sub:adder[0].datab[6]
+data[1][7] => lpm_add_sub:adder[0].datab[7]
+data[1][8] => lpm_add_sub:adder[0].datab[8]
+data[1][9] => lpm_add_sub:adder[0].datab[9]
+data[1][10] => lpm_add_sub:adder[0].datab[10]
+data[1][11] => lpm_add_sub:adder[0].datab[11]
+data[1][12] => lpm_add_sub:adder[0].datab[12]
+data[1][13] => lpm_add_sub:adder[0].datab[13]
+data[1][14] => lpm_add_sub:adder[0].datab[14]
+data[2][0] => mpar_add:sub_par_add.data[1][0]
+data[2][1] => mpar_add:sub_par_add.data[1][1]
+data[2][2] => mpar_add:sub_par_add.data[1][2]
+data[2][3] => mpar_add:sub_par_add.data[1][3]
+data[2][4] => mpar_add:sub_par_add.data[1][4]
+data[2][5] => mpar_add:sub_par_add.data[1][5]
+data[2][6] => mpar_add:sub_par_add.data[1][6]
+data[2][7] => mpar_add:sub_par_add.data[1][7]
+data[2][8] => mpar_add:sub_par_add.data[1][8]
+data[2][9] => mpar_add:sub_par_add.data[1][9]
+data[2][10] => mpar_add:sub_par_add.data[1][10]
+data[2][11] => mpar_add:sub_par_add.data[1][11]
+data[2][12] => mpar_add:sub_par_add.data[1][12]
+data[2][13] => mpar_add:sub_par_add.data[1][13]
+data[2][14] => mpar_add:sub_par_add.data[1][14]
+cin => ~NO_FANOUT~
+clk => ~NO_FANOUT~
+aclr => ~NO_FANOUT~
+clken => ~NO_FANOUT~
+result[0] <= mpar_add:sub_par_add.result[0]
+result[1] <= mpar_add:sub_par_add.result[1]
+result[2] <= mpar_add:sub_par_add.result[2]
+result[3] <= mpar_add:sub_par_add.result[3]
+result[4] <= mpar_add:sub_par_add.result[4]
+result[5] <= mpar_add:sub_par_add.result[5]
+result[6] <= mpar_add:sub_par_add.result[6]
+result[7] <= mpar_add:sub_par_add.result[7]
+result[8] <= mpar_add:sub_par_add.result[8]
+result[9] <= mpar_add:sub_par_add.result[9]
+result[10] <= mpar_add:sub_par_add.result[10]
+result[11] <= mpar_add:sub_par_add.result[11]
+result[12] <= mpar_add:sub_par_add.result[12]
+result[13] <= mpar_add:sub_par_add.result[13]
+result[14] <= mpar_add:sub_par_add.result[14]
+result[15] <= mpar_add:sub_par_add.result[15]
+result[16] <= mpar_add:sub_par_add.result[16]
+result[17] <= mpar_add:sub_par_add.result[17]
+result[18] <= mpar_add:sub_par_add.result[18]
+result[19] <= mpar_add:sub_par_add.result[19]
+result[20] <= mpar_add:sub_par_add.result[20]
+result[21] <= mpar_add:sub_par_add.result[21]
+result[22] <= mpar_add:sub_par_add.result[22]
+result[23] <= mpar_add:sub_par_add.result[23]
+result[24] <= mpar_add:sub_par_add.result[24]
+result[25] <= mpar_add:sub_par_add.result[25]
+result[26] <= mpar_add:sub_par_add.result[26]
+clk_out <= <GND>
+aclr_out <= <GND>
+clken_out <= <GND>
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]
+dataa[0] => add_sub_a9h:auto_generated.dataa[0]
+dataa[1] => add_sub_a9h:auto_generated.dataa[1]
+dataa[2] => add_sub_a9h:auto_generated.dataa[2]
+dataa[3] => add_sub_a9h:auto_generated.dataa[3]
+dataa[4] => add_sub_a9h:auto_generated.dataa[4]
+dataa[5] => add_sub_a9h:auto_generated.dataa[5]
+dataa[6] => add_sub_a9h:auto_generated.dataa[6]
+dataa[7] => add_sub_a9h:auto_generated.dataa[7]
+dataa[8] => add_sub_a9h:auto_generated.dataa[8]
+dataa[9] => add_sub_a9h:auto_generated.dataa[9]
+dataa[10] => add_sub_a9h:auto_generated.dataa[10]
+dataa[11] => add_sub_a9h:auto_generated.dataa[11]
+dataa[12] => add_sub_a9h:auto_generated.dataa[12]
+dataa[13] => add_sub_a9h:auto_generated.dataa[13]
+dataa[14] => add_sub_a9h:auto_generated.dataa[14]
+datab[0] => add_sub_a9h:auto_generated.datab[0]
+datab[1] => add_sub_a9h:auto_generated.datab[1]
+datab[2] => add_sub_a9h:auto_generated.datab[2]
+datab[3] => add_sub_a9h:auto_generated.datab[3]
+datab[4] => add_sub_a9h:auto_generated.datab[4]
+datab[5] => add_sub_a9h:auto_generated.datab[5]
+datab[6] => add_sub_a9h:auto_generated.datab[6]
+datab[7] => add_sub_a9h:auto_generated.datab[7]
+datab[8] => add_sub_a9h:auto_generated.datab[8]
+datab[9] => add_sub_a9h:auto_generated.datab[9]
+datab[10] => add_sub_a9h:auto_generated.datab[10]
+datab[11] => add_sub_a9h:auto_generated.datab[11]
+datab[12] => add_sub_a9h:auto_generated.datab[12]
+datab[13] => add_sub_a9h:auto_generated.datab[13]
+datab[14] => add_sub_a9h:auto_generated.datab[14]
+cin => ~NO_FANOUT~
+add_sub => ~NO_FANOUT~
+clock => ~NO_FANOUT~
+aclr => ~NO_FANOUT~
+clken => ~NO_FANOUT~
+result[0] <= add_sub_a9h:auto_generated.result[0]
+result[1] <= add_sub_a9h:auto_generated.result[1]
+result[2] <= add_sub_a9h:auto_generated.result[2]
+result[3] <= add_sub_a9h:auto_generated.result[3]
+result[4] <= add_sub_a9h:auto_generated.result[4]
+result[5] <= add_sub_a9h:auto_generated.result[5]
+result[6] <= add_sub_a9h:auto_generated.result[6]
+result[7] <= add_sub_a9h:auto_generated.result[7]
+result[8] <= add_sub_a9h:auto_generated.result[8]
+result[9] <= add_sub_a9h:auto_generated.result[9]
+result[10] <= add_sub_a9h:auto_generated.result[10]
+result[11] <= add_sub_a9h:auto_generated.result[11]
+result[12] <= add_sub_a9h:auto_generated.result[12]
+result[13] <= add_sub_a9h:auto_generated.result[13]
+result[14] <= add_sub_a9h:auto_generated.result[14]
+cout <= <GND>
+overflow <= <GND>
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|add_sub_a9h:auto_generated
+dataa[0] => op_1.IN28
+dataa[1] => op_1.IN26
+dataa[2] => op_1.IN24
+dataa[3] => op_1.IN22
+dataa[4] => op_1.IN20
+dataa[5] => op_1.IN18
+dataa[6] => op_1.IN16
+dataa[7] => op_1.IN14
+dataa[8] => op_1.IN12
+dataa[9] => op_1.IN10
+dataa[10] => op_1.IN8
+dataa[11] => op_1.IN6
+dataa[12] => op_1.IN4
+dataa[13] => op_1.IN2
+dataa[14] => op_1.IN0
+datab[0] => op_1.IN29
+datab[1] => op_1.IN27
+datab[2] => op_1.IN25
+datab[3] => op_1.IN23
+datab[4] => op_1.IN21
+datab[5] => op_1.IN19
+datab[6] => op_1.IN17
+datab[7] => op_1.IN15
+datab[8] => op_1.IN13
+datab[9] => op_1.IN11
+datab[10] => op_1.IN9
+datab[11] => op_1.IN7
+datab[12] => op_1.IN5
+datab[13] => op_1.IN3
+datab[14] => op_1.IN1
+result[0] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[1] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[2] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[3] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[4] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[5] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[6] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[7] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[8] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[9] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[10] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[11] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[12] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[13] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[14] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add
+data[0][0] => result[0].DATAIN
+data[0][1] => result[1].DATAIN
+data[0][2] => result[2].DATAIN
+data[0][3] => result[3].DATAIN
+data[0][4] => result[4].DATAIN
+data[0][5] => result[5].DATAIN
+data[0][6] => result[6].DATAIN
+data[0][7] => result[7].DATAIN
+data[0][8] => lpm_add_sub:adder[0].dataa[0]
+data[0][9] => lpm_add_sub:adder[0].dataa[1]
+data[0][10] => lpm_add_sub:adder[0].dataa[2]
+data[0][11] => lpm_add_sub:adder[0].dataa[3]
+data[0][12] => lpm_add_sub:adder[0].dataa[4]
+data[0][13] => lpm_add_sub:adder[0].dataa[5]
+data[0][14] => lpm_add_sub:adder[0].dataa[6]
+data[0][15] => lpm_add_sub:adder[0].dataa[7]
+data[0][16] => lpm_add_sub:adder[0].dataa[8]
+data[0][17] => lpm_add_sub:adder[0].dataa[9]
+data[0][18] => lpm_add_sub:adder[0].dataa[10]
+data[1][0] => lpm_add_sub:adder[0].datab[0]
+data[1][1] => lpm_add_sub:adder[0].datab[1]
+data[1][2] => lpm_add_sub:adder[0].datab[2]
+data[1][3] => lpm_add_sub:adder[0].datab[3]
+data[1][4] => lpm_add_sub:adder[0].datab[4]
+data[1][5] => lpm_add_sub:adder[0].datab[5]
+data[1][6] => lpm_add_sub:adder[0].datab[6]
+data[1][7] => lpm_add_sub:adder[0].datab[7]
+data[1][8] => lpm_add_sub:adder[0].datab[8]
+data[1][9] => lpm_add_sub:adder[0].datab[9]
+data[1][10] => lpm_add_sub:adder[0].datab[10]
+data[1][11] => lpm_add_sub:adder[0].datab[11]
+data[1][12] => lpm_add_sub:adder[0].datab[12]
+data[1][13] => lpm_add_sub:adder[0].datab[13]
+data[1][14] => lpm_add_sub:adder[0].datab[14]
+data[1][15] => ~NO_FANOUT~
+data[1][16] => ~NO_FANOUT~
+data[1][17] => ~NO_FANOUT~
+data[1][18] => ~NO_FANOUT~
+cin => ~NO_FANOUT~
+clk => clk_out.IN0
+aclr => aclr_out.IN0
+clken => clken_out.IN0
+result[0] <= data[0][0].DB_MAX_OUTPUT_PORT_TYPE
+result[1] <= data[0][1].DB_MAX_OUTPUT_PORT_TYPE
+result[2] <= data[0][2].DB_MAX_OUTPUT_PORT_TYPE
+result[3] <= data[0][3].DB_MAX_OUTPUT_PORT_TYPE
+result[4] <= data[0][4].DB_MAX_OUTPUT_PORT_TYPE
+result[5] <= data[0][5].DB_MAX_OUTPUT_PORT_TYPE
+result[6] <= data[0][6].DB_MAX_OUTPUT_PORT_TYPE
+result[7] <= data[0][7].DB_MAX_OUTPUT_PORT_TYPE
+result[8] <= level_result_node[0][0].DB_MAX_OUTPUT_PORT_TYPE
+result[9] <= level_result_node[0][1].DB_MAX_OUTPUT_PORT_TYPE
+result[10] <= level_result_node[0][2].DB_MAX_OUTPUT_PORT_TYPE
+result[11] <= level_result_node[0][3].DB_MAX_OUTPUT_PORT_TYPE
+result[12] <= level_result_node[0][4].DB_MAX_OUTPUT_PORT_TYPE
+result[13] <= level_result_node[0][5].DB_MAX_OUTPUT_PORT_TYPE
+result[14] <= level_result_node[0][6].DB_MAX_OUTPUT_PORT_TYPE
+result[15] <= level_result_node[0][7].DB_MAX_OUTPUT_PORT_TYPE
+result[16] <= level_result_node[0][8].DB_MAX_OUTPUT_PORT_TYPE
+result[17] <= level_result_node[0][9].DB_MAX_OUTPUT_PORT_TYPE
+result[18] <= level_result_node[0][10].DB_MAX_OUTPUT_PORT_TYPE
+result[19] <= level_result_node[0][11].DB_MAX_OUTPUT_PORT_TYPE
+result[20] <= level_result_node[0][12].DB_MAX_OUTPUT_PORT_TYPE
+result[21] <= level_result_node[0][13].DB_MAX_OUTPUT_PORT_TYPE
+result[22] <= level_result_node[0][14].DB_MAX_OUTPUT_PORT_TYPE
+result[23] <= level_result_node[0][15].DB_MAX_OUTPUT_PORT_TYPE
+result[24] <= level_result_node[0][16].DB_MAX_OUTPUT_PORT_TYPE
+result[25] <= level_result_node[0][17].DB_MAX_OUTPUT_PORT_TYPE
+result[26] <= level_result_node[0][18].DB_MAX_OUTPUT_PORT_TYPE
+clk_out <= clk_out.DB_MAX_OUTPUT_PORT_TYPE
+aclr_out <= aclr_out.DB_MAX_OUTPUT_PORT_TYPE
+clken_out <= clken_out.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]
+dataa[0] => add_sub_e9h:auto_generated.dataa[0]
+dataa[1] => add_sub_e9h:auto_generated.dataa[1]
+dataa[2] => add_sub_e9h:auto_generated.dataa[2]
+dataa[3] => add_sub_e9h:auto_generated.dataa[3]
+dataa[4] => add_sub_e9h:auto_generated.dataa[4]
+dataa[5] => add_sub_e9h:auto_generated.dataa[5]
+dataa[6] => add_sub_e9h:auto_generated.dataa[6]
+dataa[7] => add_sub_e9h:auto_generated.dataa[7]
+dataa[8] => add_sub_e9h:auto_generated.dataa[8]
+dataa[9] => add_sub_e9h:auto_generated.dataa[9]
+dataa[10] => add_sub_e9h:auto_generated.dataa[10]
+dataa[11] => add_sub_e9h:auto_generated.dataa[11]
+dataa[12] => add_sub_e9h:auto_generated.dataa[12]
+dataa[13] => add_sub_e9h:auto_generated.dataa[13]
+dataa[14] => add_sub_e9h:auto_generated.dataa[14]
+dataa[15] => add_sub_e9h:auto_generated.dataa[15]
+dataa[16] => add_sub_e9h:auto_generated.dataa[16]
+dataa[17] => add_sub_e9h:auto_generated.dataa[17]
+dataa[18] => add_sub_e9h:auto_generated.dataa[18]
+datab[0] => add_sub_e9h:auto_generated.datab[0]
+datab[1] => add_sub_e9h:auto_generated.datab[1]
+datab[2] => add_sub_e9h:auto_generated.datab[2]
+datab[3] => add_sub_e9h:auto_generated.datab[3]
+datab[4] => add_sub_e9h:auto_generated.datab[4]
+datab[5] => add_sub_e9h:auto_generated.datab[5]
+datab[6] => add_sub_e9h:auto_generated.datab[6]
+datab[7] => add_sub_e9h:auto_generated.datab[7]
+datab[8] => add_sub_e9h:auto_generated.datab[8]
+datab[9] => add_sub_e9h:auto_generated.datab[9]
+datab[10] => add_sub_e9h:auto_generated.datab[10]
+datab[11] => add_sub_e9h:auto_generated.datab[11]
+datab[12] => add_sub_e9h:auto_generated.datab[12]
+datab[13] => add_sub_e9h:auto_generated.datab[13]
+datab[14] => add_sub_e9h:auto_generated.datab[14]
+datab[15] => add_sub_e9h:auto_generated.datab[15]
+datab[16] => add_sub_e9h:auto_generated.datab[16]
+datab[17] => add_sub_e9h:auto_generated.datab[17]
+datab[18] => add_sub_e9h:auto_generated.datab[18]
+cin => ~NO_FANOUT~
+add_sub => ~NO_FANOUT~
+clock => ~NO_FANOUT~
+aclr => ~NO_FANOUT~
+clken => ~NO_FANOUT~
+result[0] <= add_sub_e9h:auto_generated.result[0]
+result[1] <= add_sub_e9h:auto_generated.result[1]
+result[2] <= add_sub_e9h:auto_generated.result[2]
+result[3] <= add_sub_e9h:auto_generated.result[3]
+result[4] <= add_sub_e9h:auto_generated.result[4]
+result[5] <= add_sub_e9h:auto_generated.result[5]
+result[6] <= add_sub_e9h:auto_generated.result[6]
+result[7] <= add_sub_e9h:auto_generated.result[7]
+result[8] <= add_sub_e9h:auto_generated.result[8]
+result[9] <= add_sub_e9h:auto_generated.result[9]
+result[10] <= add_sub_e9h:auto_generated.result[10]
+result[11] <= add_sub_e9h:auto_generated.result[11]
+result[12] <= add_sub_e9h:auto_generated.result[12]
+result[13] <= add_sub_e9h:auto_generated.result[13]
+result[14] <= add_sub_e9h:auto_generated.result[14]
+result[15] <= add_sub_e9h:auto_generated.result[15]
+result[16] <= add_sub_e9h:auto_generated.result[16]
+result[17] <= add_sub_e9h:auto_generated.result[17]
+result[18] <= add_sub_e9h:auto_generated.result[18]
+cout <= <GND>
+overflow <= <GND>
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|add_sub_e9h:auto_generated
+dataa[0] => op_1.IN36
+dataa[1] => op_1.IN34
+dataa[2] => op_1.IN32
+dataa[3] => op_1.IN30
+dataa[4] => op_1.IN28
+dataa[5] => op_1.IN26
+dataa[6] => op_1.IN24
+dataa[7] => op_1.IN22
+dataa[8] => op_1.IN20
+dataa[9] => op_1.IN18
+dataa[10] => op_1.IN16
+dataa[11] => op_1.IN14
+dataa[12] => op_1.IN12
+dataa[13] => op_1.IN10
+dataa[14] => op_1.IN8
+dataa[15] => op_1.IN6
+dataa[16] => op_1.IN4
+dataa[17] => op_1.IN2
+dataa[18] => op_1.IN0
+datab[0] => op_1.IN37
+datab[1] => op_1.IN35
+datab[2] => op_1.IN33
+datab[3] => op_1.IN31
+datab[4] => op_1.IN29
+datab[5] => op_1.IN27
+datab[6] => op_1.IN25
+datab[7] => op_1.IN23
+datab[8] => op_1.IN21
+datab[9] => op_1.IN19
+datab[10] => op_1.IN17
+datab[11] => op_1.IN15
+datab[12] => op_1.IN13
+datab[13] => op_1.IN11
+datab[14] => op_1.IN9
+datab[15] => op_1.IN7
+datab[16] => op_1.IN5
+datab[17] => op_1.IN3
+datab[18] => op_1.IN1
+result[0] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[1] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[2] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[3] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[4] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[5] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[6] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[7] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[8] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[9] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[10] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[11] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[12] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[13] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[14] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[15] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[16] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[17] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+result[18] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|mult_by_h666:mul_by_h666|lpm_mult:lpm_mult_component|altshift:external_latency_ffs
+data[0] => result[0].DATAIN
+data[1] => result[1].DATAIN
+data[2] => result[2].DATAIN
+data[3] => result[3].DATAIN
+data[4] => result[4].DATAIN
+data[5] => result[5].DATAIN
+data[6] => result[6].DATAIN
+data[7] => result[7].DATAIN
+data[8] => result[8].DATAIN
+data[9] => result[9].DATAIN
+data[10] => result[10].DATAIN
+data[11] => result[11].DATAIN
+data[12] => result[12].DATAIN
+data[13] => result[13].DATAIN
+data[14] => result[14].DATAIN
+data[15] => result[15].DATAIN
+data[16] => result[16].DATAIN
+data[17] => result[17].DATAIN
+data[18] => result[18].DATAIN
+data[19] => result[19].DATAIN
+clock => ~NO_FANOUT~
+aclr => ~NO_FANOUT~
+clken => ~NO_FANOUT~
+result[0] <= data[0].DB_MAX_OUTPUT_PORT_TYPE
+result[1] <= data[1].DB_MAX_OUTPUT_PORT_TYPE
+result[2] <= data[2].DB_MAX_OUTPUT_PORT_TYPE
+result[3] <= data[3].DB_MAX_OUTPUT_PORT_TYPE
+result[4] <= data[4].DB_MAX_OUTPUT_PORT_TYPE
+result[5] <= data[5].DB_MAX_OUTPUT_PORT_TYPE
+result[6] <= data[6].DB_MAX_OUTPUT_PORT_TYPE
+result[7] <= data[7].DB_MAX_OUTPUT_PORT_TYPE
+result[8] <= data[8].DB_MAX_OUTPUT_PORT_TYPE
+result[9] <= data[9].DB_MAX_OUTPUT_PORT_TYPE
+result[10] <= data[10].DB_MAX_OUTPUT_PORT_TYPE
+result[11] <= data[11].DB_MAX_OUTPUT_PORT_TYPE
+result[12] <= data[12].DB_MAX_OUTPUT_PORT_TYPE
+result[13] <= data[13].DB_MAX_OUTPUT_PORT_TYPE
+result[14] <= data[14].DB_MAX_OUTPUT_PORT_TYPE
+result[15] <= data[15].DB_MAX_OUTPUT_PORT_TYPE
+result[16] <= data[16].DB_MAX_OUTPUT_PORT_TYPE
+result[17] <= data[17].DB_MAX_OUTPUT_PORT_TYPE
+result[18] <= data[18].DB_MAX_OUTPUT_PORT_TYPE
+result[19] <= data[19].DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd
+B[0] => BCD_0[0].DATAIN
+B[1] => w35[0].IN1
+B[2] => w30[0].IN1
+B[3] => w26[0].IN1
+B[4] => w22[0].IN1
+B[5] => w18[0].IN1
+B[6] => w15[0].IN1
+B[7] => w12[0].IN1
+B[8] => w9[0].IN1
+B[9] => w7[0].IN1
+B[10] => w5[0].IN1
+B[11] => w3[0].IN1
+B[12] => w2[0].IN1
+B[13] => w1[0].IN1
+B[14] => w1[1].IN1
+B[15] => w1[2].IN1
+BCD_0[0] <= B[0].DB_MAX_OUTPUT_PORT_TYPE
+BCD_0[1] <= add3_ge5:A35.port1
+BCD_0[2] <= add3_ge5:A35.port1
+BCD_0[3] <= add3_ge5:A35.port1
+BCD_1[0] <= add3_ge5:A35.port1
+BCD_1[1] <= add3_ge5:A34.port1
+BCD_1[2] <= add3_ge5:A34.port1
+BCD_1[3] <= add3_ge5:A34.port1
+BCD_2[0] <= add3_ge5:A34.port1
+BCD_2[1] <= add3_ge5:A33.port1
+BCD_2[2] <= add3_ge5:A33.port1
+BCD_2[3] <= add3_ge5:A33.port1
+BCD_3[0] <= add3_ge5:A33.port1
+BCD_3[1] <= add3_ge5:A32.port1
+BCD_3[2] <= add3_ge5:A32.port1
+BCD_3[3] <= add3_ge5:A32.port1
+BCD_4[0] <= add3_ge5:A32.port1
+BCD_4[1] <= add3_ge5:A31.port1
+BCD_4[2] <= add3_ge5:A31.port1
+BCD_4[3] <= add3_ge5:A31.port1
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A1
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A2
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A3
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A4
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A5
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A6
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A7
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A8
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A9
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A10
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A11
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A12
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A13
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A14
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A15
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A16
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A17
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A18
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A19
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A20
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A21
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A22
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A23
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A24
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A25
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A26
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A27
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A28
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A29
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A30
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A31
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A32
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A33
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A34
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|bin2bcd_16:bcd|add3_ge5:A35
+w[0] => Decoder0.IN3
+w[1] => Decoder0.IN2
+w[2] => Decoder0.IN1
+w[3] => Decoder0.IN0
+a[0] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+a[1] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+a[2] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+a[3] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|ex19|processor:echo_var_delay|hex_to_7seg:h0
+out[0] <= WideOr6.DB_MAX_OUTPUT_PORT_TYPE
+out[1] <= WideOr5.DB_MAX_OUTPUT_PORT_TYPE
+out[2] <= WideOr4.DB_MAX_OUTPUT_PORT_TYPE
+out[3] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+out[4] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+out[5] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+out[6] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+in[0] => Decoder0.IN3
+in[1] => Decoder0.IN2
+in[2] => Decoder0.IN1
+in[3] => Decoder0.IN0
+
+
+|ex19|processor:echo_var_delay|hex_to_7seg:h1
+out[0] <= WideOr6.DB_MAX_OUTPUT_PORT_TYPE
+out[1] <= WideOr5.DB_MAX_OUTPUT_PORT_TYPE
+out[2] <= WideOr4.DB_MAX_OUTPUT_PORT_TYPE
+out[3] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+out[4] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+out[5] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+out[6] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+in[0] => Decoder0.IN3
+in[1] => Decoder0.IN2
+in[2] => Decoder0.IN1
+in[3] => Decoder0.IN0
+
+
+|ex19|processor:echo_var_delay|hex_to_7seg:h2
+out[0] <= WideOr6.DB_MAX_OUTPUT_PORT_TYPE
+out[1] <= WideOr5.DB_MAX_OUTPUT_PORT_TYPE
+out[2] <= WideOr4.DB_MAX_OUTPUT_PORT_TYPE
+out[3] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+out[4] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+out[5] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+out[6] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+in[0] => Decoder0.IN3
+in[1] => Decoder0.IN2
+in[2] => Decoder0.IN1
+in[3] => Decoder0.IN0
+
+
+|ex19|processor:echo_var_delay|hex_to_7seg:h3
+out[0] <= WideOr6.DB_MAX_OUTPUT_PORT_TYPE
+out[1] <= WideOr5.DB_MAX_OUTPUT_PORT_TYPE
+out[2] <= WideOr4.DB_MAX_OUTPUT_PORT_TYPE
+out[3] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+out[4] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+out[5] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+out[6] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+in[0] => Decoder0.IN3
+in[1] => Decoder0.IN2
+in[2] => Decoder0.IN1
+in[3] => Decoder0.IN0
+
+
+|ex19|processor:echo_var_delay|hex_to_7seg:h4
+out[0] <= WideOr6.DB_MAX_OUTPUT_PORT_TYPE
+out[1] <= WideOr5.DB_MAX_OUTPUT_PORT_TYPE
+out[2] <= WideOr4.DB_MAX_OUTPUT_PORT_TYPE
+out[3] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
+out[4] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
+out[5] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
+out[6] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
+in[0] => Decoder0.IN3
+in[1] => Decoder0.IN2
+in[2] => Decoder0.IN1
+in[3] => Decoder0.IN0
+
+