| Mode | Name | Size | |
|---|---|---|---|
| -rwxr-xr-x | LFSR.v | 194 | logstatsplain |
| -rwxr-xr-x | add3_ge5.v | 510 | logstatsplain |
| -rwxr-xr-x | bin2bcd_16.v | 3102 | logstatsplain |
| -rwxr-xr-x | counter_16.v | 365 | logstatsplain |
| -rwxr-xr-x | counter_8.v | 309 | logstatsplain |
| -rwxr-xr-x | delay.v | 1024 | logstatsplain |
| -rwxr-xr-x | ex8.v | 718 | logstatsplain |
| -rwxr-xr-x | formula_fsm.v | 1181 | logstatsplain |
| -rwxr-xr-x | hex_to_7seg.v | 591 | logstatsplain |
| -rwxr-xr-x | tick_2500.v | 518 | logstatsplain |
| -rwxr-xr-x | tick_50000.v | 435 | logstatsplain |
 |
index : VerilogCoursework | |
| Unnamed repository; edit this file 'description' to name the repository. |
| summaryrefslogtreecommitdiffstats |