part_3/ex10/ex10.v


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module ex10(CLOCK_50, SW, DAC_CS, DAC_SDI, DAC_LD, DAC_SCK);

	input CLOCK_50;
	input [9:0] SW;
	output DAC_CS, DAC_SDI, DAC_LD, DAC_SCK;
	
	wire load;
	
	tick_5000 t(CLOCK_50, load);
	spi2dac s(CLOCK_50, SW, load, DAC_SDI, DAC_CS, DAC_SCK, DAC_LD);

endmodule