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|
vendor_name = ModelSim
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Library/add3_ge5.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/echo_feedback.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/pwm.v
source_file = 1, edge_detect.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/pulse_gen.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/top.v
source_file = 1, ROM.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/multiply_k.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/clk_div.v
source_file = 1, accumulator.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/spi2dac.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/spi2adc.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/delay_ram.v
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/altsyncram.tdf
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/stratix_ram_block.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/lpm_mux.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/lpm_decode.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/aglobal160.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/a_rdenreg.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/altrom.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/altram.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/altdpram.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/cbx.lst
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/db/altsyncram_ip02.tdf
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/lpm_mult.tdf
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/lpm_add_sub.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/multcore.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/bypassff.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/altshift.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/multcore.tdf
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/csa_add.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/mpar_add.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/muleabz.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/mul_lfrg.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/mul_boothc.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/alt_ded_mult.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/alt_ded_mult_y.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/dffpipe.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/mpar_add.tdf
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/lpm_add_sub.tdf
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/addcore.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/look_add.inc
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/alt_stratix_add_sub.inc
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/db/add_sub_a9h.tdf
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/db/add_sub_e9h.tdf
source_file = 1, c:/altera_lite/16.0/quartus/libraries/megafunctions/altshift.tdf
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/bin2bcd.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/hex_to_7seg.v
source_file = 1, Y:/_My Documents/EE2 Digital - New Experiment/VERI/Ex15/top.sdc
design_name = top
instance = comp, \HEX0[0]~output , HEX0[0]~output, top, 1
instance = comp, \HEX0[1]~output , HEX0[1]~output, top, 1
instance = comp, \HEX0[2]~output , HEX0[2]~output, top, 1
instance = comp, \HEX0[3]~output , HEX0[3]~output, top, 1
instance = comp, \HEX0[4]~output , HEX0[4]~output, top, 1
instance = comp, \HEX0[5]~output , HEX0[5]~output, top, 1
instance = comp, \HEX0[6]~output , HEX0[6]~output, top, 1
instance = comp, \HEX1[0]~output , HEX1[0]~output, top, 1
instance = comp, \HEX1[1]~output , HEX1[1]~output, top, 1
instance = comp, \HEX1[2]~output , HEX1[2]~output, top, 1
instance = comp, \HEX1[3]~output , HEX1[3]~output, top, 1
instance = comp, \HEX1[4]~output , HEX1[4]~output, top, 1
instance = comp, \HEX1[5]~output , HEX1[5]~output, top, 1
instance = comp, \HEX1[6]~output , HEX1[6]~output, top, 1
instance = comp, \HEX2[0]~output , HEX2[0]~output, top, 1
instance = comp, \HEX2[1]~output , HEX2[1]~output, top, 1
instance = comp, \HEX2[2]~output , HEX2[2]~output, top, 1
instance = comp, \HEX2[3]~output , HEX2[3]~output, top, 1
instance = comp, \HEX2[4]~output , HEX2[4]~output, top, 1
instance = comp, \HEX2[5]~output , HEX2[5]~output, top, 1
instance = comp, \HEX2[6]~output , HEX2[6]~output, top, 1
instance = comp, \HEX3[0]~output , HEX3[0]~output, top, 1
instance = comp, \HEX3[1]~output , HEX3[1]~output, top, 1
instance = comp, \HEX3[2]~output , HEX3[2]~output, top, 1
instance = comp, \HEX3[3]~output , HEX3[3]~output, top, 1
instance = comp, \HEX3[4]~output , HEX3[4]~output, top, 1
instance = comp, \HEX3[5]~output , HEX3[5]~output, top, 1
instance = comp, \HEX3[6]~output , HEX3[6]~output, top, 1
instance = comp, \DAC_SDI~output , DAC_SDI~output, top, 1
instance = comp, \DAC_SCK~output , DAC_SCK~output, top, 1
instance = comp, \DAC_CS~output , DAC_CS~output, top, 1
instance = comp, \DAC_LD~output , DAC_LD~output, top, 1
instance = comp, \ADC_SDI~output , ADC_SDI~output, top, 1
instance = comp, \ADC_SCK~output , ADC_SCK~output, top, 1
instance = comp, \ADC_CS~output , ADC_CS~output, top, 1
instance = comp, \PWM_OUT~output , PWM_OUT~output, top, 1
instance = comp, \SW[4]~input , SW[4]~input, top, 1
instance = comp, \SW[5]~input , SW[5]~input, top, 1
instance = comp, \SW[6]~input , SW[6]~input, top, 1
instance = comp, \SW[1]~input , SW[1]~input, top, 1
instance = comp, \SW[0]~input , SW[0]~input, top, 1
instance = comp, \SW[2]~input , SW[2]~input, top, 1
instance = comp, \SW[3]~input , SW[3]~input, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|romout[0][12]~2 , SCALER|lpm_mult_component|mult_core|romout[0][12]~2, top, 1
instance = comp, \SW[7]~input , SW[7]~input, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|romout[0][11]~1 , SCALER|lpm_mult_component|mult_core|romout[0][11]~1, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|romout[0][10]~0 , SCALER|lpm_mult_component|mult_core|romout[0][10]~0, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|romout[1][9]~5 , SCALER|lpm_mult_component|mult_core|romout[1][9]~5, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|romout[1][4]~6 , SCALER|lpm_mult_component|mult_core|romout[1][4]~6, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~58 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~58, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~54 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~54, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~50 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~50, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~46 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~46, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~42 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~42, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~37 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~37, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~1 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~1, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~5 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~5, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~9 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~9, top, 1
instance = comp, \SW[8]~input , SW[8]~input, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~42 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~42, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~1 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~1, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~5 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~5, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~9 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~9, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|romout[0][14]~4 , SCALER|lpm_mult_component|mult_core|romout[0][14]~4, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|romout[0][13]~3 , SCALER|lpm_mult_component|mult_core|romout[0][13]~3, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~13 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~13, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~17 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~17, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~21 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~21, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~25 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~25, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~29 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~29, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~13 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~13, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~17 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~17, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~21 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~21, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~25 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~25, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~29 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~29, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~33 , SCALER|lpm_mult_component|mult_core|padder|adder[0]|auto_generated|op_1~33, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~33 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~33, top, 1
instance = comp, \SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~37 , SCALER|lpm_mult_component|mult_core|padder|sub_par_add|adder[0]|auto_generated|op_1~37, top, 1
instance = comp, \BCD_CONVERT|A9|WideOr2~0 , BCD_CONVERT|A9|WideOr2~0, top, 1
instance = comp, \BCD_CONVERT|A9|WideOr1~0 , BCD_CONVERT|A9|WideOr1~0, top, 1
instance = comp, \BCD_CONVERT|A9|WideOr3~0 , BCD_CONVERT|A9|WideOr3~0, top, 1
instance = comp, \BCD_CONVERT|A12|WideOr1~0 , BCD_CONVERT|A12|WideOr1~0, top, 1
instance = comp, \BCD_CONVERT|A12|WideOr2~0 , BCD_CONVERT|A12|WideOr2~0, top, 1
instance = comp, \BCD_CONVERT|A12|WideOr3~0 , BCD_CONVERT|A12|WideOr3~0, top, 1
instance = comp, \BCD_CONVERT|A15|WideOr1~0 , BCD_CONVERT|A15|WideOr1~0, top, 1
instance = comp, \BCD_CONVERT|A15|WideOr2~0 , BCD_CONVERT|A15|WideOr2~0, top, 1
instance = comp, \BCD_CONVERT|A15|WideOr3~0 , BCD_CONVERT|A15|WideOr3~0, top, 1
instance = comp, \BCD_CONVERT|A18|WideOr2~0 , BCD_CONVERT|A18|WideOr2~0, top, 1
instance = comp, \BCD_CONVERT|A18|WideOr1~0 , BCD_CONVERT|A18|WideOr1~0, top, 1
instance = comp, \BCD_CONVERT|A18|WideOr3~0 , BCD_CONVERT|A18|WideOr3~0, top, 1
instance = comp, \BCD_CONVERT|A21|WideOr1~0 , BCD_CONVERT|A21|WideOr1~0, top, 1
instance = comp, \BCD_CONVERT|A21|WideOr3~0 , BCD_CONVERT|A21|WideOr3~0, top, 1
instance = comp, \BCD_CONVERT|A21|WideOr2~0 , BCD_CONVERT|A21|WideOr2~0, top, 1
instance = comp, \BCD_CONVERT|A25|WideOr2~0 , BCD_CONVERT|A25|WideOr2~0, top, 1
instance = comp, \BCD_CONVERT|A25|WideOr1~0 , BCD_CONVERT|A25|WideOr1~0, top, 1
instance = comp, \BCD_CONVERT|A25|WideOr3~0 , BCD_CONVERT|A25|WideOr3~0, top, 1
instance = comp, \SEG0|WideOr6~0 , SEG0|WideOr6~0, top, 1
instance = comp, \SEG0|WideOr5~0 , SEG0|WideOr5~0, top, 1
instance = comp, \SEG0|WideOr4~0 , SEG0|WideOr4~0, top, 1
instance = comp, \SEG0|WideOr3~0 , SEG0|WideOr3~0, top, 1
instance = comp, \SEG0|WideOr2~0 , SEG0|WideOr2~0, top, 1
instance = comp, \SEG0|WideOr1~0 , SEG0|WideOr1~0, top, 1
instance = comp, \SEG0|WideOr0~0 , SEG0|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A25|WideOr0~0 , BCD_CONVERT|A25|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A17|WideOr1~0 , BCD_CONVERT|A17|WideOr1~0, top, 1
instance = comp, \BCD_CONVERT|A17|WideOr3~0 , BCD_CONVERT|A17|WideOr3~0, top, 1
instance = comp, \BCD_CONVERT|A17|WideOr2~0 , BCD_CONVERT|A17|WideOr2~0, top, 1
instance = comp, \BCD_CONVERT|A18|WideOr0~0 , BCD_CONVERT|A18|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A20|WideOr2~0 , BCD_CONVERT|A20|WideOr2~0, top, 1
instance = comp, \BCD_CONVERT|A20|WideOr3~0 , BCD_CONVERT|A20|WideOr3~0, top, 1
instance = comp, \BCD_CONVERT|A20|WideOr1~0 , BCD_CONVERT|A20|WideOr1~0, top, 1
instance = comp, \BCD_CONVERT|A21|WideOr0~0 , BCD_CONVERT|A21|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A24|WideOr3~0 , BCD_CONVERT|A24|WideOr3~0, top, 1
instance = comp, \BCD_CONVERT|A24|WideOr1~0 , BCD_CONVERT|A24|WideOr1~0, top, 1
instance = comp, \BCD_CONVERT|A24|WideOr2~0 , BCD_CONVERT|A24|WideOr2~0, top, 1
instance = comp, \SEG1|WideOr6~0 , SEG1|WideOr6~0, top, 1
instance = comp, \SEG1|WideOr5~0 , SEG1|WideOr5~0, top, 1
instance = comp, \SEG1|WideOr4~0 , SEG1|WideOr4~0, top, 1
instance = comp, \SEG1|WideOr3~0 , SEG1|WideOr3~0, top, 1
instance = comp, \SEG1|WideOr2~0 , SEG1|WideOr2~0, top, 1
instance = comp, \SEG1|WideOr1~0 , SEG1|WideOr1~0, top, 1
instance = comp, \SEG1|WideOr0~0 , SEG1|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A24|WideOr0~0 , BCD_CONVERT|A24|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A20|WideOr0~0 , BCD_CONVERT|A20|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A17|WideOr0~0 , BCD_CONVERT|A17|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A7|WideOr0~0 , BCD_CONVERT|A7|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A9|WideOr0~0 , BCD_CONVERT|A9|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A12|WideOr0~0 , BCD_CONVERT|A12|WideOr0~0, top, 1
instance = comp, \BCD_CONVERT|A14|WideOr0~0 , BCD_CONVERT|A14|WideOr0~0, top, 1
instance = comp, \SEG2|Decoder0~1 , SEG2|Decoder0~1, top, 1
instance = comp, \SEG2|Decoder0~0 , SEG2|Decoder0~0, top, 1
instance = comp, \SEG2|WideOr6 , SEG2|WideOr6, top, 1
instance = comp, \SEG2|Decoder0~2 , SEG2|Decoder0~2, top, 1
instance = comp, \SEG2|WideOr5 , SEG2|WideOr5, top, 1
instance = comp, \SEG2|Decoder0~3 , SEG2|Decoder0~3, top, 1
instance = comp, \SEG2|Decoder0~4 , SEG2|Decoder0~4, top, 1
instance = comp, \SEG2|Decoder0~5 , SEG2|Decoder0~5, top, 1
instance = comp, \SEG2|WideOr2~0 , SEG2|WideOr2~0, top, 1
instance = comp, \SEG2|Decoder0~6 , SEG2|Decoder0~6, top, 1
instance = comp, \SEG2|WideOr2 , SEG2|WideOr2, top, 1
instance = comp, \SEG2|WideOr1 , SEG2|WideOr1, top, 1
instance = comp, \SEG2|WideOr0 , SEG2|WideOr0, top, 1
instance = comp, \BCD_CONVERT|A23|WideOr0~0 , BCD_CONVERT|A23|WideOr0~0, top, 1
instance = comp, \CLOCK_50~input , CLOCK_50~input, top, 1
instance = comp, \SPI_DAC|clk_1MHz~0 , SPI_DAC|clk_1MHz~0, top, 1
instance = comp, \CLOCK_50~inputCLKENA0 , CLOCK_50~inputCLKENA0, top, 1
instance = comp, \SPI_ADC|ctr[4] , SPI_ADC|ctr[4], top, 1
instance = comp, \SPI_ADC|ctr[0] , SPI_ADC|ctr[0], top, 1
instance = comp, \SPI_ADC|Add0~0 , SPI_ADC|Add0~0, top, 1
instance = comp, \SPI_ADC|ctr[4]~DUPLICATE , SPI_ADC|ctr[4]~DUPLICATE, top, 1
instance = comp, \SPI_ADC|ctr[1] , SPI_ADC|ctr[1], top, 1
instance = comp, \SPI_ADC|ctr[3] , SPI_ADC|ctr[3], top, 1
instance = comp, \SPI_ADC|ctr~2 , SPI_ADC|ctr~2, top, 1
instance = comp, \SPI_ADC|ctr[1]~DUPLICATE , SPI_ADC|ctr[1]~DUPLICATE, top, 1
instance = comp, \SPI_ADC|ctr~1 , SPI_ADC|ctr~1, top, 1
instance = comp, \SPI_ADC|ctr[0]~DUPLICATE , SPI_ADC|ctr[0]~DUPLICATE, top, 1
instance = comp, \SPI_ADC|ctr[2] , SPI_ADC|ctr[2], top, 1
instance = comp, \SPI_ADC|ctr~0 , SPI_ADC|ctr~0, top, 1
instance = comp, \SPI_ADC|ctr[2]~DUPLICATE , SPI_ADC|ctr[2]~DUPLICATE, top, 1
instance = comp, \SPI_ADC|Add0~1 , SPI_ADC|Add0~1, top, 1
instance = comp, \SPI_ADC|ctr[3]~DUPLICATE , SPI_ADC|ctr[3]~DUPLICATE, top, 1
instance = comp, \SPI_DAC|Equal0~0 , SPI_DAC|Equal0~0, top, 1
instance = comp, \SPI_DAC|clk_1MHz , SPI_DAC|clk_1MHz, top, 1
instance = comp, \SPI_DAC|Selector6~0 , SPI_DAC|Selector6~0, top, 1
instance = comp, \SPI_DAC|state[2] , SPI_DAC|state[2], top, 1
instance = comp, \SPI_DAC|Selector5~0 , SPI_DAC|Selector5~0, top, 1
instance = comp, \SPI_DAC|state[3]~DUPLICATE , SPI_DAC|state[3]~DUPLICATE, top, 1
instance = comp, \SPI_DAC|Selector4~0 , SPI_DAC|Selector4~0, top, 1
instance = comp, \SPI_DAC|state[4]~feeder , SPI_DAC|state[4]~feeder, top, 1
instance = comp, \SPI_DAC|state[4] , SPI_DAC|state[4], top, 1
instance = comp, \SPI_DAC|state[3] , SPI_DAC|state[3], top, 1
instance = comp, \SPI_DAC|Selector8~0 , SPI_DAC|Selector8~0, top, 1
instance = comp, \SPI_DAC|state[0] , SPI_DAC|state[0], top, 1
instance = comp, \SPI_DAC|Selector7~0 , SPI_DAC|Selector7~0, top, 1
instance = comp, \SPI_DAC|state[1] , SPI_DAC|state[1], top, 1
instance = comp, \SPI_DAC|Selector9~0 , SPI_DAC|Selector9~0, top, 1
instance = comp, \SPI_DAC|dac_cs , SPI_DAC|dac_cs, top, 1
instance = comp, \GEN_10K|Add0~41 , GEN_10K|Add0~41, top, 1
instance = comp, \GEN_10K|ctr[0] , GEN_10K|ctr[0], top, 1
instance = comp, \GEN_10K|Add0~45 , GEN_10K|Add0~45, top, 1
instance = comp, \GEN_10K|ctr[1] , GEN_10K|ctr[1], top, 1
instance = comp, \GEN_10K|Add0~77 , GEN_10K|Add0~77, top, 1
instance = comp, \GEN_10K|Add0~53 , GEN_10K|Add0~53, top, 1
instance = comp, \GEN_10K|Add0~57 , GEN_10K|Add0~57, top, 1
instance = comp, \GEN_10K|ctr[8] , GEN_10K|ctr[8], top, 1
instance = comp, \GEN_10K|Add0~21 , GEN_10K|Add0~21, top, 1
instance = comp, \GEN_10K|ctr[9] , GEN_10K|ctr[9], top, 1
instance = comp, \GEN_10K|Add0~25 , GEN_10K|Add0~25, top, 1
instance = comp, \GEN_10K|ctr[10] , GEN_10K|ctr[10], top, 1
instance = comp, \GEN_10K|Add0~61 , GEN_10K|Add0~61, top, 1
instance = comp, \GEN_10K|ctr[11] , GEN_10K|ctr[11], top, 1
instance = comp, \GEN_10K|Add0~29 , GEN_10K|Add0~29, top, 1
instance = comp, \GEN_10K|ctr[12] , GEN_10K|ctr[12], top, 1
instance = comp, \GEN_10K|Add0~33 , GEN_10K|Add0~33, top, 1
instance = comp, \GEN_10K|ctr[13] , GEN_10K|ctr[13], top, 1
instance = comp, \GEN_10K|Add0~37 , GEN_10K|Add0~37, top, 1
instance = comp, \GEN_10K|ctr[14] , GEN_10K|ctr[14], top, 1
instance = comp, \GEN_10K|Add0~5 , GEN_10K|Add0~5, top, 1
instance = comp, \GEN_10K|ctr[15] , GEN_10K|ctr[15], top, 1
instance = comp, \GEN_10K|Add0~9 , GEN_10K|Add0~9, top, 1
instance = comp, \GEN_10K|ctr[16] , GEN_10K|ctr[16], top, 1
instance = comp, \GEN_10K|Add0~13 , GEN_10K|Add0~13, top, 1
instance = comp, \GEN_10K|ctr[17] , GEN_10K|ctr[17], top, 1
instance = comp, \GEN_10K|Add0~65 , GEN_10K|Add0~65, top, 1
instance = comp, \GEN_10K|ctr[18] , GEN_10K|ctr[18], top, 1
instance = comp, \GEN_10K|Add0~69 , GEN_10K|Add0~69, top, 1
instance = comp, \GEN_10K|ctr[19] , GEN_10K|ctr[19], top, 1
instance = comp, \GEN_10K|Equal0~3 , GEN_10K|Equal0~3, top, 1
instance = comp, \GEN_10K|Add0~1 , GEN_10K|Add0~1, top, 1
instance = comp, \GEN_10K|ctr[20] , GEN_10K|ctr[20], top, 1
instance = comp, \GEN_10K|Equal0~0 , GEN_10K|Equal0~0, top, 1
instance = comp, \GEN_10K|Equal0~1 , GEN_10K|Equal0~1, top, 1
instance = comp, \GEN_10K|Equal0~4 , GEN_10K|Equal0~4, top, 1
instance = comp, \GEN_10K|ctr[2] , GEN_10K|ctr[2], top, 1
instance = comp, \GEN_10K|Add0~81 , GEN_10K|Add0~81, top, 1
instance = comp, \GEN_10K|ctr[3] , GEN_10K|ctr[3], top, 1
instance = comp, \GEN_10K|Add0~73 , GEN_10K|Add0~73, top, 1
instance = comp, \GEN_10K|ctr[4] , GEN_10K|ctr[4], top, 1
instance = comp, \GEN_10K|Add0~17 , GEN_10K|Add0~17, top, 1
instance = comp, \GEN_10K|ctr[5] , GEN_10K|ctr[5], top, 1
instance = comp, \GEN_10K|Add0~49 , GEN_10K|Add0~49, top, 1
instance = comp, \GEN_10K|ctr[6] , GEN_10K|ctr[6], top, 1
instance = comp, \GEN_10K|ctr[7] , GEN_10K|ctr[7], top, 1
instance = comp, \GEN_10K|Equal0~2 , GEN_10K|Equal0~2, top, 1
instance = comp, \GEN_10K|clkout , GEN_10K|clkout, top, 1
instance = comp, \GEN_10K|clkout~0 , GEN_10K|clkout~0, top, 1
instance = comp, \GEN_10K|clkout~DUPLICATE , GEN_10K|clkout~DUPLICATE, top, 1
instance = comp, \PULSE|state.IDLE , PULSE|state.IDLE, top, 1
instance = comp, \PULSE|pulse~1 , PULSE|pulse~1, top, 1
instance = comp, \PULSE|pulse , PULSE|pulse, top, 1
instance = comp, \SPI_DAC|Selector2~0 , SPI_DAC|Selector2~0, top, 1
instance = comp, \SPI_DAC|sr_state.WAIT_CSB_HIGH , SPI_DAC|sr_state.WAIT_CSB_HIGH, top, 1
instance = comp, \SPI_DAC|Selector0~0 , SPI_DAC|Selector0~0, top, 1
instance = comp, \SPI_DAC|sr_state.IDLE , SPI_DAC|sr_state.IDLE, top, 1
instance = comp, \SPI_DAC|Selector1~0 , SPI_DAC|Selector1~0, top, 1
instance = comp, \SPI_DAC|sr_state.WAIT_CSB_FALL , SPI_DAC|sr_state.WAIT_CSB_FALL, top, 1
instance = comp, \SPI_DAC|dac_start~0 , SPI_DAC|dac_start~0, top, 1
instance = comp, \SPI_DAC|dac_start , SPI_DAC|dac_start, top, 1
instance = comp, \SPI_ADC|clk_1MHz~0 , SPI_ADC|clk_1MHz~0, top, 1
instance = comp, \SPI_ADC|clk_1MHz , SPI_ADC|clk_1MHz, top, 1
instance = comp, \SPI_ADC|state[1]~0 , SPI_ADC|state[1]~0, top, 1
instance = comp, \SPI_ADC|state[1] , SPI_ADC|state[1], top, 1
instance = comp, \SPI_ADC|state[2]~2 , SPI_ADC|state[2]~2, top, 1
instance = comp, \SPI_ADC|state[2] , SPI_ADC|state[2], top, 1
instance = comp, \SPI_ADC|Selector2~0 , SPI_ADC|Selector2~0, top, 1
instance = comp, \SPI_ADC|sr_state.WAIT_CSB_HIGH , SPI_ADC|sr_state.WAIT_CSB_HIGH, top, 1
instance = comp, \SPI_ADC|Selector0~0 , SPI_ADC|Selector0~0, top, 1
instance = comp, \SPI_ADC|sr_state.IDLE , SPI_ADC|sr_state.IDLE, top, 1
instance = comp, \SPI_ADC|Selector1~0 , SPI_ADC|Selector1~0, top, 1
instance = comp, \SPI_ADC|sr_state.WAIT_CSB_FALL , SPI_ADC|sr_state.WAIT_CSB_FALL, top, 1
instance = comp, \SPI_ADC|adc_start~0 , SPI_ADC|adc_start~0, top, 1
instance = comp, \SPI_ADC|adc_start , SPI_ADC|adc_start, top, 1
instance = comp, \SPI_ADC|Selector5~0 , SPI_ADC|Selector5~0, top, 1
instance = comp, \SPI_ADC|state[0] , SPI_ADC|state[0], top, 1
instance = comp, \SPI_ADC|state[3]~3 , SPI_ADC|state[3]~3, top, 1
instance = comp, \SPI_ADC|state[3] , SPI_ADC|state[3], top, 1
instance = comp, \SPI_ADC|state~1 , SPI_ADC|state~1, top, 1
instance = comp, \SPI_ADC|state[4] , SPI_ADC|state[4], top, 1
instance = comp, \SPI_ADC|adc_start~DUPLICATE , SPI_ADC|adc_start~DUPLICATE, top, 1
instance = comp, \SPI_ADC|Selector4~0 , SPI_ADC|Selector4~0, top, 1
instance = comp, \SPI_ADC|adc_cs , SPI_ADC|adc_cs, top, 1
instance = comp, \ECHO|PULSE2|state.IDLE~0 , ECHO|PULSE2|state.IDLE~0, top, 1
instance = comp, \ECHO|PULSE2|state.IDLE , ECHO|PULSE2|state.IDLE, top, 1
instance = comp, \ECHO|PULSE2|pulse~1 , ECHO|PULSE2|pulse~1, top, 1
instance = comp, \ECHO|PULSE2|pulse , ECHO|PULSE2|pulse, top, 1
instance = comp, \ECHO|ctr[0]~0 , ECHO|ctr[0]~0, top, 1
instance = comp, \ECHO|ctr[0] , ECHO|ctr[0], top, 1
instance = comp, \ECHO|Add1~1 , ECHO|Add1~1, top, 1
instance = comp, \ECHO|ctr[1] , ECHO|ctr[1], top, 1
instance = comp, \ECHO|ctr[2] , ECHO|ctr[2], top, 1
instance = comp, \ECHO|Add1~5 , ECHO|Add1~5, top, 1
instance = comp, \ECHO|ctr[2]~DUPLICATE , ECHO|ctr[2]~DUPLICATE, top, 1
instance = comp, \ECHO|Add1~9 , ECHO|Add1~9, top, 1
instance = comp, \ECHO|ctr[3] , ECHO|ctr[3], top, 1
instance = comp, \ECHO|ctr[4] , ECHO|ctr[4], top, 1
instance = comp, \ECHO|Add1~13 , ECHO|Add1~13, top, 1
instance = comp, \ECHO|ctr[4]~DUPLICATE , ECHO|ctr[4]~DUPLICATE, top, 1
instance = comp, \ECHO|Add2~1 , ECHO|Add2~1, top, 1
instance = comp, \ECHO|Add1~17 , ECHO|Add1~17, top, 1
instance = comp, \ECHO|ctr[5] , ECHO|ctr[5], top, 1
instance = comp, \ECHO|Add2~5 , ECHO|Add2~5, top, 1
instance = comp, \ECHO|Add1~21 , ECHO|Add1~21, top, 1
instance = comp, \ECHO|ctr[6] , ECHO|ctr[6], top, 1
instance = comp, \ECHO|Add2~9 , ECHO|Add2~9, top, 1
instance = comp, \ECHO|Add1~25 , ECHO|Add1~25, top, 1
instance = comp, \ECHO|ctr[7] , ECHO|ctr[7], top, 1
instance = comp, \ECHO|Add2~13 , ECHO|Add2~13, top, 1
instance = comp, \ECHO|Add1~29 , ECHO|Add1~29, top, 1
instance = comp, \ECHO|ctr[8] , ECHO|ctr[8], top, 1
instance = comp, \ECHO|Add2~17 , ECHO|Add2~17, top, 1
instance = comp, \ECHO|Add1~33 , ECHO|Add1~33, top, 1
instance = comp, \ECHO|ctr[9] , ECHO|ctr[9], top, 1
instance = comp, \ECHO|Add2~21 , ECHO|Add2~21, top, 1
instance = comp, \ECHO|Add1~37 , ECHO|Add1~37, top, 1
instance = comp, \ECHO|ctr[10] , ECHO|ctr[10], top, 1
instance = comp, \ECHO|Add2~25 , ECHO|Add2~25, top, 1
instance = comp, \ECHO|ctr[11] , ECHO|ctr[11], top, 1
instance = comp, \ECHO|Add1~41 , ECHO|Add1~41, top, 1
instance = comp, \ECHO|ctr[11]~DUPLICATE , ECHO|ctr[11]~DUPLICATE, top, 1
instance = comp, \ECHO|Add2~29 , ECHO|Add2~29, top, 1
instance = comp, \ECHO|Add1~45 , ECHO|Add1~45, top, 1
instance = comp, \ECHO|ctr[12] , ECHO|ctr[12], top, 1
instance = comp, \ECHO|Add2~33 , ECHO|Add2~33, top, 1
instance = comp, \ECHO|ctr[6]~DUPLICATE , ECHO|ctr[6]~DUPLICATE, top, 1
instance = comp, \ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a8 , ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a8, top, 1
instance = comp, \ADC_SDO~input , ADC_SDO~input, top, 1
instance = comp, \SPI_ADC|shift_reg[0]~feeder , SPI_ADC|shift_reg[0]~feeder, top, 1
instance = comp, \SPI_ADC|WideOr0~0 , SPI_ADC|WideOr0~0, top, 1
instance = comp, \SPI_ADC|shift_ena , SPI_ADC|shift_ena, top, 1
instance = comp, \SPI_ADC|always3~0 , SPI_ADC|always3~0, top, 1
instance = comp, \SPI_ADC|shift_reg[0] , SPI_ADC|shift_reg[0], top, 1
instance = comp, \SPI_ADC|shift_reg[1]~feeder , SPI_ADC|shift_reg[1]~feeder, top, 1
instance = comp, \SPI_ADC|shift_reg[1] , SPI_ADC|shift_reg[1], top, 1
instance = comp, \SPI_ADC|shift_reg[2]~feeder , SPI_ADC|shift_reg[2]~feeder, top, 1
instance = comp, \SPI_ADC|shift_reg[2] , SPI_ADC|shift_reg[2], top, 1
instance = comp, \SPI_ADC|shift_reg[3]~feeder , SPI_ADC|shift_reg[3]~feeder, top, 1
instance = comp, \SPI_ADC|shift_reg[3] , SPI_ADC|shift_reg[3], top, 1
instance = comp, \SPI_ADC|shift_reg[4]~feeder , SPI_ADC|shift_reg[4]~feeder, top, 1
instance = comp, \SPI_ADC|shift_reg[4] , SPI_ADC|shift_reg[4], top, 1
instance = comp, \SPI_ADC|shift_reg[5] , SPI_ADC|shift_reg[5], top, 1
instance = comp, \SPI_ADC|shift_reg[6] , SPI_ADC|shift_reg[6], top, 1
instance = comp, \SPI_ADC|shift_reg[7] , SPI_ADC|shift_reg[7], top, 1
instance = comp, \SPI_ADC|shift_reg[8] , SPI_ADC|shift_reg[8], top, 1
instance = comp, \SPI_ADC|shift_reg[9]~feeder , SPI_ADC|shift_reg[9]~feeder, top, 1
instance = comp, \SPI_ADC|shift_reg[9] , SPI_ADC|shift_reg[9], top, 1
instance = comp, \SPI_ADC|Decoder0~0 , SPI_ADC|Decoder0~0, top, 1
instance = comp, \SPI_ADC|adc_done , SPI_ADC|adc_done, top, 1
instance = comp, \SPI_ADC|data_from_adc[9] , SPI_ADC|data_from_adc[9], top, 1
instance = comp, \SPI_ADC|data_from_adc[8]~feeder , SPI_ADC|data_from_adc[8]~feeder, top, 1
instance = comp, \SPI_ADC|data_from_adc[8] , SPI_ADC|data_from_adc[8], top, 1
instance = comp, \ECHO|Add0~33 , ECHO|Add0~33, top, 1
instance = comp, \SPI_ADC|data_from_adc[7] , SPI_ADC|data_from_adc[7], top, 1
instance = comp, \ECHO|Add3~9 , ECHO|Add3~9, top, 1
instance = comp, \ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a6 , ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a6, top, 1
instance = comp, \SPI_ADC|shift_reg[6]~DUPLICATE , SPI_ADC|shift_reg[6]~DUPLICATE, top, 1
instance = comp, \SPI_ADC|data_from_adc[6] , SPI_ADC|data_from_adc[6], top, 1
instance = comp, \ECHO|Add0~1 , ECHO|Add0~1, top, 1
instance = comp, \ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a5 , ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a5, top, 1
instance = comp, \SPI_ADC|data_from_adc[5] , SPI_ADC|data_from_adc[5], top, 1
instance = comp, \ECHO|Add0~5 , ECHO|Add0~5, top, 1
instance = comp, \ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a4 , ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a4, top, 1
instance = comp, \SPI_ADC|data_from_adc[4] , SPI_ADC|data_from_adc[4], top, 1
instance = comp, \ECHO|Add0~9 , ECHO|Add0~9, top, 1
instance = comp, \ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a3 , ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a3, top, 1
instance = comp, \SPI_ADC|data_from_adc[3]~feeder , SPI_ADC|data_from_adc[3]~feeder, top, 1
instance = comp, \SPI_ADC|data_from_adc[3] , SPI_ADC|data_from_adc[3], top, 1
instance = comp, \SPI_ADC|data_from_adc[2]~feeder , SPI_ADC|data_from_adc[2]~feeder, top, 1
instance = comp, \SPI_ADC|data_from_adc[2] , SPI_ADC|data_from_adc[2], top, 1
instance = comp, \ECHO|Add0~13 , ECHO|Add0~13, top, 1
instance = comp, \ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a2 , ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a2, top, 1
instance = comp, \SPI_ADC|data_from_adc[1]~feeder , SPI_ADC|data_from_adc[1]~feeder, top, 1
instance = comp, \SPI_ADC|data_from_adc[1] , SPI_ADC|data_from_adc[1], top, 1
instance = comp, \ECHO|Add0~17 , ECHO|Add0~17, top, 1
instance = comp, \ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a1 , ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a1, top, 1
instance = comp, \ECHO|Add0~21 , ECHO|Add0~21, top, 1
instance = comp, \ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a0 , ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a0, top, 1
instance = comp, \SPI_ADC|data_from_adc[0]~feeder , SPI_ADC|data_from_adc[0]~feeder, top, 1
instance = comp, \SPI_ADC|data_from_adc[0] , SPI_ADC|data_from_adc[0], top, 1
instance = comp, \ECHO|Add0~25 , ECHO|Add0~25, top, 1
instance = comp, \ECHO|Add0~37 , ECHO|Add0~37, top, 1
instance = comp, \ECHO|Add3~5 , ECHO|Add3~5, top, 1
instance = comp, \ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a7 , ECHO|DELAY|altsyncram_component|auto_generated|ram_block1a7, top, 1
instance = comp, \ECHO|Add0~29 , ECHO|Add0~29, top, 1
instance = comp, \ECHO|Add3~1 , ECHO|Add3~1, top, 1
instance = comp, \ECHO|data_out[9]~0 , ECHO|data_out[9]~0, top, 1
instance = comp, \ECHO|data_out[9] , ECHO|data_out[9], top, 1
instance = comp, \SPI_DAC|shift_reg[11]~feeder , SPI_DAC|shift_reg[11]~feeder, top, 1
instance = comp, \ECHO|data_out[8] , ECHO|data_out[8], top, 1
instance = comp, \SPI_DAC|shift_reg[10]~feeder , SPI_DAC|shift_reg[10]~feeder, top, 1
instance = comp, \ECHO|data_out[7] , ECHO|data_out[7], top, 1
instance = comp, \SPI_DAC|shift_reg[9]~feeder , SPI_DAC|shift_reg[9]~feeder, top, 1
instance = comp, \ECHO|data_out[6] , ECHO|data_out[6], top, 1
instance = comp, \SPI_DAC|shift_reg[8]~feeder , SPI_DAC|shift_reg[8]~feeder, top, 1
instance = comp, \ECHO|data_out[5] , ECHO|data_out[5], top, 1
instance = comp, \SPI_DAC|shift_reg[7]~feeder , SPI_DAC|shift_reg[7]~feeder, top, 1
instance = comp, \ECHO|data_out[4] , ECHO|data_out[4], top, 1
instance = comp, \SPI_DAC|shift_reg[6]~feeder , SPI_DAC|shift_reg[6]~feeder, top, 1
instance = comp, \ECHO|data_out[3] , ECHO|data_out[3], top, 1
instance = comp, \SPI_DAC|shift_reg[5]~feeder , SPI_DAC|shift_reg[5]~feeder, top, 1
instance = comp, \ECHO|data_out[2] , ECHO|data_out[2], top, 1
instance = comp, \SPI_DAC|shift_reg[4]~feeder , SPI_DAC|shift_reg[4]~feeder, top, 1
instance = comp, \ECHO|data_out[1] , ECHO|data_out[1], top, 1
instance = comp, \SPI_DAC|shift_reg[3]~feeder , SPI_DAC|shift_reg[3]~feeder, top, 1
instance = comp, \ECHO|data_out[0] , ECHO|data_out[0], top, 1
instance = comp, \SPI_DAC|shift_reg~4 , SPI_DAC|shift_reg~4, top, 1
instance = comp, \SPI_DAC|shift_reg[2] , SPI_DAC|shift_reg[2], top, 1
instance = comp, \SPI_DAC|always3~0 , SPI_DAC|always3~0, top, 1
instance = comp, \SPI_DAC|shift_reg[3] , SPI_DAC|shift_reg[3], top, 1
instance = comp, \SPI_DAC|shift_reg[4] , SPI_DAC|shift_reg[4], top, 1
instance = comp, \SPI_DAC|shift_reg[5] , SPI_DAC|shift_reg[5], top, 1
instance = comp, \SPI_DAC|shift_reg[6] , SPI_DAC|shift_reg[6], top, 1
instance = comp, \SPI_DAC|shift_reg[7] , SPI_DAC|shift_reg[7], top, 1
instance = comp, \SPI_DAC|shift_reg[8] , SPI_DAC|shift_reg[8], top, 1
instance = comp, \SPI_DAC|shift_reg[9] , SPI_DAC|shift_reg[9], top, 1
instance = comp, \SPI_DAC|shift_reg[10] , SPI_DAC|shift_reg[10], top, 1
instance = comp, \SPI_DAC|shift_reg[11] , SPI_DAC|shift_reg[11], top, 1
instance = comp, \SPI_DAC|shift_reg~3 , SPI_DAC|shift_reg~3, top, 1
instance = comp, \SPI_DAC|shift_reg[12] , SPI_DAC|shift_reg[12], top, 1
instance = comp, \SPI_DAC|shift_reg~2 , SPI_DAC|shift_reg~2, top, 1
instance = comp, \SPI_DAC|shift_reg[13] , SPI_DAC|shift_reg[13], top, 1
instance = comp, \SPI_DAC|shift_reg~1 , SPI_DAC|shift_reg~1, top, 1
instance = comp, \SPI_DAC|shift_reg[14] , SPI_DAC|shift_reg[14], top, 1
instance = comp, \SPI_DAC|shift_reg~0 , SPI_DAC|shift_reg~0, top, 1
instance = comp, \SPI_DAC|shift_reg[15] , SPI_DAC|shift_reg[15], top, 1
instance = comp, \SPI_DAC|dac_sck , SPI_DAC|dac_sck, top, 1
instance = comp, \SPI_DAC|Equal2~0 , SPI_DAC|Equal2~0, top, 1
instance = comp, \SPI_DAC|dac_ld , SPI_DAC|dac_ld, top, 1
instance = comp, \SW[9]~input , SW[9]~input, top, 1
instance = comp, \SPI_ADC|Selector6~0 , SPI_ADC|Selector6~0, top, 1
instance = comp, \SPI_ADC|adc_din , SPI_ADC|adc_din, top, 1
instance = comp, \SPI_ADC|adc_sck , SPI_ADC|adc_sck, top, 1
instance = comp, \PWM_DC|count[0]~0 , PWM_DC|count[0]~0, top, 1
instance = comp, \PWM_DC|count[0] , PWM_DC|count[0], top, 1
instance = comp, \PWM_DC|Add0~33 , PWM_DC|Add0~33, top, 1
instance = comp, \PWM_DC|count[1] , PWM_DC|count[1], top, 1
instance = comp, \PWM_DC|Add0~29 , PWM_DC|Add0~29, top, 1
instance = comp, \PWM_DC|count[2] , PWM_DC|count[2], top, 1
instance = comp, \PWM_DC|Add0~25 , PWM_DC|Add0~25, top, 1
instance = comp, \PWM_DC|count[3] , PWM_DC|count[3], top, 1
instance = comp, \PWM_DC|Add0~21 , PWM_DC|Add0~21, top, 1
instance = comp, \PWM_DC|count[4] , PWM_DC|count[4], top, 1
instance = comp, \PWM_DC|Add0~17 , PWM_DC|Add0~17, top, 1
instance = comp, \PWM_DC|count[5] , PWM_DC|count[5], top, 1
instance = comp, \PWM_DC|Add0~13 , PWM_DC|Add0~13, top, 1
instance = comp, \PWM_DC|count[6] , PWM_DC|count[6], top, 1
instance = comp, \PWM_DC|Add0~9 , PWM_DC|Add0~9, top, 1
instance = comp, \PWM_DC|count[7] , PWM_DC|count[7], top, 1
instance = comp, \PWM_DC|Add0~5 , PWM_DC|Add0~5, top, 1
instance = comp, \PWM_DC|count[8] , PWM_DC|count[8], top, 1
instance = comp, \PWM_DC|Add0~1 , PWM_DC|Add0~1, top, 1
instance = comp, \PWM_DC|count[9] , PWM_DC|count[9], top, 1
instance = comp, \PWM_DC|d[7] , PWM_DC|d[7], top, 1
instance = comp, \PWM_DC|LessThan0~0 , PWM_DC|LessThan0~0, top, 1
instance = comp, \PWM_DC|LessThan0~1 , PWM_DC|LessThan0~1, top, 1
instance = comp, \PWM_DC|d[0]~feeder , PWM_DC|d[0]~feeder, top, 1
instance = comp, \PWM_DC|d[0] , PWM_DC|d[0], top, 1
instance = comp, \PWM_DC|d[2] , PWM_DC|d[2], top, 1
instance = comp, \PWM_DC|d[1] , PWM_DC|d[1], top, 1
instance = comp, \PWM_DC|LessThan0~2 , PWM_DC|LessThan0~2, top, 1
instance = comp, \PWM_DC|d[4] , PWM_DC|d[4], top, 1
instance = comp, \PWM_DC|d[3] , PWM_DC|d[3], top, 1
instance = comp, \PWM_DC|LessThan0~3 , PWM_DC|LessThan0~3, top, 1
instance = comp, \PWM_DC|d[5] , PWM_DC|d[5], top, 1
instance = comp, \PWM_DC|d[6]~feeder , PWM_DC|d[6]~feeder, top, 1
instance = comp, \PWM_DC|d[6] , PWM_DC|d[6], top, 1
instance = comp, \PWM_DC|LessThan0~4 , PWM_DC|LessThan0~4, top, 1
instance = comp, \PWM_DC|d[8] , PWM_DC|d[8], top, 1
instance = comp, \PWM_DC|d[9] , PWM_DC|d[9], top, 1
instance = comp, \PWM_DC|LessThan0~5 , PWM_DC|LessThan0~5, top, 1
instance = comp, \PWM_DC|pwm_out , PWM_DC|pwm_out, top, 1
instance = comp, \~QUARTUS_CREATED_GND~I , ~QUARTUS_CREATED_GND~I, top, 1
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