Adding initial files

author: Yann Herklotz <ymherklotz@gmail.com> 2017-05-10 13:17:31 +0100
committer: Yann Herklotz <ymherklotz@gmail.com> 2017-05-10 13:17:31 +0100
commit: aa30a51f3e2d9120aa819c1bc8162793662ccf32 (patch)
tree: e7659204b1ecf3f65fae106c12b096fd552c2d8d /mbed/hal
download: WaveGenerator-aa30a51f3e2d9120aa819c1bc8162793662ccf32.tar.gz
WaveGenerator-aa30a51f3e2d9120aa819c1bc8162793662ccf32.zip
26 files changed, 3429 insertions, 0 deletions
diff --git a/mbed/hal/Driver_Common.h b/mbed/hal/Driver_Common.h
new file mode 100644
index 0000000..dbf2568
--- /dev/null
+++ b/mbed/hal/Driver_Common.h
@@ -0,0 +1,58 @@
+
+/** \addtogroup hal */
+/** @{*/
+/*
+ * Copyright (c) 2006-2016, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __DRIVER_COMMON_H
+#define __DRIVER_COMMON_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#define ARM_DRIVER_VERSION_MAJOR_MINOR(major,minor) (((major) << 8) | (minor))
+
+/**
+\brief Driver Version
+*/
+typedef struct _ARM_DRIVER_VERSION {
+  uint16_t api;                         ///< API version
+  uint16_t drv;                         ///< Driver version
+} ARM_DRIVER_VERSION;
+
+/* General return codes */
+#define ARM_DRIVER_OK                 0 ///< Operation succeeded
+#define ARM_DRIVER_ERROR             -1 ///< Unspecified error
+#define ARM_DRIVER_ERROR_BUSY        -2 ///< Driver is busy
+#define ARM_DRIVER_ERROR_TIMEOUT     -3 ///< Timeout occurred
+#define ARM_DRIVER_ERROR_UNSUPPORTED -4 ///< Operation not supported
+#define ARM_DRIVER_ERROR_PARAMETER   -5 ///< Parameter error
+#define ARM_DRIVER_ERROR_SPECIFIC    -6 ///< Start of driver specific errors
+
+/**
+\brief General power states
+*/
+typedef enum _ARM_POWER_STATE {
+  ARM_POWER_OFF,                        ///< Power off: no operation possible
+  ARM_POWER_LOW,                        ///< Low Power mode: retain state, detect and signal wake-up events
+  ARM_POWER_FULL                        ///< Power on: full operation at maximum performance
+} ARM_POWER_STATE;
+
+#endif /* __DRIVER_COMMON_H */
+
+/** @}*/
diff --git a/mbed/hal/Driver_Storage.h b/mbed/hal/Driver_Storage.h
new file mode 100644
index 0000000..1f51861
--- /dev/null
+++ b/mbed/hal/Driver_Storage.h
@@ -0,0 +1,773 @@
+
+/** \addtogroup hal */
+/** @{*/
+/*
+ * Copyright (c) 2006-2016, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __DRIVER_STORAGE_H
+#define __DRIVER_STORAGE_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+#include "Driver_Common.h"
+
+#define ARM_STORAGE_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,00)  /* API version */
+
+
+#define _ARM_Driver_Storage_(n)      Driver_Storage##n
+#define  ARM_Driver_Storage_(n) _ARM_Driver_Storage_(n)
+
+#define ARM_STORAGE_INVALID_OFFSET  (0xFFFFFFFFFFFFFFFFULL) ///< Invalid address (relative to a storage controller's
+                                                            ///< address space). A storage block may never start at this address.
+
+#define ARM_STORAGE_INVALID_ADDRESS (0xFFFFFFFFUL)          ///< Invalid address within the processor's memory address space.
+                                                            ///< Refer to memory-mapped storage, i.e. < \ref ARM_DRIVER_STORAGE::ResolveAddress().
+
+/****** Storage specific error codes *****/
+#define ARM_STORAGE_ERROR_NOT_ERASABLE      (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Part (or all) of the range provided to Erase() isn't erasable.
+#define ARM_STORAGE_ERROR_NOT_PROGRAMMABLE  (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Part (or all) of the range provided to ProgramData() isn't programmable.
+#define ARM_STORAGE_ERROR_PROTECTED         (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Part (or all) of the range to Erase() or ProgramData() is protected.
+#define ARM_STORAGE_ERROR_RUNTIME_OR_INTEGRITY_FAILURE (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Runtime or sanity-check failure.
+
+/**
+ * \brief Attributes of the storage range within a storage block.
+ */
+typedef struct _ARM_STORAGE_BLOCK_ATTRIBUTES {
+  uint32_t erasable      :  1;   ///< Erasing blocks is permitted with a minimum granularity of 'erase_unit'.
+                                 ///<   @note: if 'erasable' is 0--i.e. the 'erase' operation isn't available--then
+                                 ///<   'erase_unit' (see below) is immaterial and should be 0.
+  uint32_t programmable  :  1;   ///< Writing to ranges is permitted with a minimum granularity of 'program_unit'.
+                                 ///<   Writes are typically achieved through the ProgramData operation (following an erase);
+                                 ///<   if storage isn't erasable (see 'erasable' above) but is memory-mapped
+                                 ///<   (i.e. 'memory_mapped'), it can be written directly using memory-store operations.
+  uint32_t executable    :  1;   ///< This storage block can hold program data; the processor can fetch and execute code
+                                 ///<   sourced from it. Often this is accompanied with the device being 'memory_mapped' (see \ref ARM_STORAGE_INFO).
+  uint32_t protectable   :  1;   ///< The entire block can be protected from program and erase operations. Once protection
+                                 ///<   is enabled for a block, its 'erasable' and 'programmable' bits are turned off.
+  uint32_t reserved      : 28;
+  uint32_t erase_unit;           ///< Minimum erase size in bytes.
+                                 ///<   The offset of the start of the erase-range should also be aligned with this value.
+                                 ///<   Applicable if the 'erasable' attribute is set for the block.
+                                 ///<   @note: if 'erasable' (see above) is 0--i.e. the 'erase' operation isn't available--then
+                                 ///<   'erase_unit' is immaterial and should be 0.
+  uint32_t protection_unit;      ///< Minimum protectable size in bytes. Applicable if the 'protectable'
+                                 ///<   attribute is set for the block. This should be a divisor of the block's size. A
+                                 ///<   block can be considered to be made up of consecutive, individually-protectable fragments.
+} ARM_STORAGE_BLOCK_ATTRIBUTES;
+
+/**
+ * \brief A storage block is a range of memory with uniform attributes. Storage blocks
+ * combine to make up the address map of a storage controller.
+ */
+typedef struct _ARM_STORAGE_BLOCK {
+  uint64_t                     addr;       ///< This is the start address of the storage block. It is
+                                           ///<   expressed as an offset from the start of the storage map
+                                           ///<   maintained by the owning storage controller.
+  uint64_t                     size;       ///< This is the size of the storage block, in units of bytes.
+                                           ///<   Together with addr, it describes a range [addr, addr+size).
+  ARM_STORAGE_BLOCK_ATTRIBUTES attributes; ///< Attributes for this block.
+} ARM_STORAGE_BLOCK;
+
+/**
+ * The check for a valid ARM_STORAGE_BLOCK.
+ */
+#define ARM_STORAGE_VALID_BLOCK(BLK) (((BLK)->addr != ARM_STORAGE_INVALID_OFFSET) && ((BLK)->size != 0))
+
+/**
+ * \brief Values for encoding storage memory-types with respect to programmability.
+ *
+ * Please ensure that the maximum of the following memory types doesn't exceed 16; we
+ * encode this in a 4-bit field within ARM_STORAGE_INFO::programmability.
+ */
+#define ARM_STORAGE_PROGRAMMABILITY_RAM       (0x0)
+#define ARM_STORAGE_PROGRAMMABILITY_ROM       (0x1) ///< Read-only memory.
+#define ARM_STORAGE_PROGRAMMABILITY_WORM      (0x2) ///< write-once-read-only-memory (WORM).
+#define ARM_STORAGE_PROGRAMMABILITY_ERASABLE  (0x3) ///< re-programmable based on erase. Supports multiple writes.
+
+/**
+ * Values for encoding data-retention levels for storage blocks.
+ *
+ * Please ensure that the maximum of the following retention types doesn't exceed 16; we
+ * encode this in a 4-bit field within ARM_STORAGE_INFO::retention_level.
+ */
+#define ARM_RETENTION_WHILE_DEVICE_ACTIVE     (0x0) ///< Data is retained only during device activity.
+#define ARM_RETENTION_ACROSS_SLEEP            (0x1) ///< Data is retained across processor sleep.
+#define ARM_RETENTION_ACROSS_DEEP_SLEEP       (0x2) ///< Data is retained across processor deep-sleep.
+#define ARM_RETENTION_BATTERY_BACKED          (0x3) ///< Data is battery-backed. Device can be powered off.
+#define ARM_RETENTION_NVM                     (0x4) ///< Data is retained in non-volatile memory.
+
+/**
+ * Device Data Security Protection Features. Applicable mostly to EXTERNAL_NVM.
+ */
+typedef struct _ARM_STORAGE_SECURITY_FEATURES {
+  uint32_t acls                :  1; ///< Protection against internal software attacks using ACLs.
+  uint32_t rollback_protection :  1; ///< Roll-back protection. Set to true if the creator of the storage
+                                     ///<   can ensure that an external attacker can't force an
+                                     ///<   older firmware to run or to revert back to a previous state.
+  uint32_t tamper_proof        :  1; ///< Tamper-proof memory (will be deleted on tamper-attempts using board level or chip level sensors).
+  uint32_t internal_flash      :  1; ///< Internal flash.
+  uint32_t reserved1           : 12;
+
+  /**
+   * Encode support for hardening against various classes of attacks.
+   */
+  uint32_t software_attacks     :  1; ///< device software (malware running on the device).
+  uint32_t board_level_attacks  :  1; ///< board level attacks (debug probes, copy protection fuses.)
+  uint32_t chip_level_attacks   :  1; ///< chip level attacks (tamper-protection).
+  uint32_t side_channel_attacks :  1; ///< side channel attacks.
+  uint32_t reserved2            : 12;
+} ARM_STORAGE_SECURITY_FEATURES;
+
+#define ARM_STORAGE_PROGRAM_CYCLES_INFINITE (0UL) /**< Infinite or unknown endurance for reprogramming. */
+
+/**
+ * \brief Storage information. This contains device-metadata. It is the return
+ *     value from calling GetInfo() on the storage driver.
+ *
+ * \details These fields serve a different purpose than the ones contained in
+ *     \ref ARM_STORAGE_CAPABILITIES, which is another structure containing
+ *     device-level metadata. ARM_STORAGE_CAPABILITIES describes the API
+ *     capabilities, whereas ARM_STORAGE_INFO describes the device. Furthermore
+ *     ARM_STORAGE_CAPABILITIES fits within a single word, and is designed to be
+ *     passed around by value; ARM_STORAGE_INFO, on the other hand, contains
+ *     metadata which doesn't fit into a single word and requires the use of
+ *     pointers to be moved around.
+ */
+typedef struct _ARM_STORAGE_INFO {
+  uint64_t                      total_storage;        ///< Total available storage, in bytes.
+  uint32_t                      program_unit;         ///< Minimum programming size in bytes.
+                                                      ///<   The offset of the start of the program-range should also be aligned with this value.
+                                                      ///<   Applicable only if the 'programmable' attribute is set for a block.
+                                                      ///<   @note: setting program_unit to 0 has the effect of disabling the size and alignment
+                                                      ///<   restrictions (setting it to 1 also has the same effect).
+  uint32_t                      optimal_program_unit; ///< Optimal programming page-size in bytes. Some storage controllers
+                                                      ///<   have internal buffers into which to receive data. Writing in chunks of
+                                                      ///<   'optimal_program_unit' would achieve maximum programming speed.
+                                                      ///<   Applicable only if the 'programmable' attribute is set for the underlying block(s).
+  uint32_t                      program_cycles;       ///< A measure of endurance for reprogramming.
+                                                      ///<   Use ARM_STORAGE_PROGRAM_CYCLES_INFINITE for infinite or unknown endurance.
+  uint32_t                      erased_value    :  1; ///< Contents of erased memory (usually 1 to indicate erased bytes with state 0xFF).
+  uint32_t                      memory_mapped   :  1; ///< This storage device has a mapping onto the processor's memory address space.
+                                                      ///<   @note: For a memory-mapped block which isn't erasable but is programmable (i.e. if
+                                                      ///<   'erasable' is set to 0, but 'programmable' is 1), writes should be possible directly to
+                                                      ///<   the memory-mapped storage without going through the ProgramData operation.
+  uint32_t                      programmability :  4; ///< A value to indicate storage programmability.
+  uint32_t                      retention_level :  4;
+  uint32_t                      reserved        : 22;
+  ARM_STORAGE_SECURITY_FEATURES security;             ///< \ref ARM_STORAGE_SECURITY_FEATURES
+} ARM_STORAGE_INFO;
+
+/**
+\brief Operating status of the storage controller.
+*/
+typedef struct _ARM_STORAGE_STATUS {
+  uint32_t busy  : 1;                   ///< Controller busy flag
+  uint32_t error : 1;                   ///< Read/Program/Erase error flag (cleared on start of next operation)
+} ARM_STORAGE_STATUS;
+
+/**
+ * \brief Storage Driver API Capabilities.
+ *
+ * This data structure is designed to fit within a single word so that it can be
+ * fetched cheaply using a call to driver->GetCapabilities().
+ */
+typedef struct _ARM_STORAGE_CAPABILITIES {
+  uint32_t asynchronous_ops :  1; ///< Used to indicate if APIs like initialize,
+                                  ///<   read, erase, program, etc. can operate in asynchronous mode.
+                                  ///<   Setting this bit to 1 means that the driver is capable
+                                  ///<   of launching asynchronous operations; command completion is
+                                  ///<   signaled by the invocation of a completion callback. If
+                                  ///<   set to 1, drivers may still complete asynchronous
+                                  ///<   operations synchronously as necessary--in which case they
+                                  ///<   return a positive error code to indicate synchronous completion.
+  uint32_t erase_all        :  1; ///< Supports EraseAll operation.
+  uint32_t reserved         : 30;
+} ARM_STORAGE_CAPABILITIES;
+
+/**
+ * Command opcodes for Storage. Completion callbacks use these codes to refer to
+ * completing commands. Refer to \ref ARM_Storage_Callback_t.
+ */
+typedef enum _ARM_STORAGE_OPERATION {
+  ARM_STORAGE_OPERATION_GET_VERSION,
+  ARM_STORAGE_OPERATION_GET_CAPABILITIES,
+  ARM_STORAGE_OPERATION_INITIALIZE,
+  ARM_STORAGE_OPERATION_UNINITIALIZE,
+  ARM_STORAGE_OPERATION_POWER_CONTROL,
+  ARM_STORAGE_OPERATION_READ_DATA,
+  ARM_STORAGE_OPERATION_PROGRAM_DATA,
+  ARM_STORAGE_OPERATION_ERASE,
+  ARM_STORAGE_OPERATION_ERASE_ALL,
+  ARM_STORAGE_OPERATION_GET_STATUS,
+  ARM_STORAGE_OPERATION_GET_INFO,
+  ARM_STORAGE_OPERATION_RESOLVE_ADDRESS,
+  ARM_STORAGE_OPERATION_GET_NEXT_BLOCK,
+  ARM_STORAGE_OPERATION_GET_BLOCK
+} ARM_STORAGE_OPERATION;
+
+/**
+ * Declaration of the callback-type for command completion.
+ *
+ * @param [in] status
+ *               A code to indicate the status of the completed operation. For data
+ *               transfer operations, the status field is overloaded in case of
+ *               success to return the count of items successfully transferred; this
+ *               can be done safely because error codes are negative values.
+ *
+ * @param [in] operation
+ *               The command op-code. This value isn't essential for the callback in
+ *               the presence of the command instance-id, but it is expected that
+ *               this information could be a quick and useful filter.
+ */
+typedef void (*ARM_Storage_Callback_t)(int32_t status, ARM_STORAGE_OPERATION operation);
+
+/**
+ * This is the set of operations constituting the Storage driver. Their
+ * implementation is platform-specific, and needs to be supplied by the
+ * porting effort.
+ *
+ * Some APIs within `ARM_DRIVER_STORAGE` will always operate synchronously:
+ * GetVersion, GetCapabilities, GetStatus, GetInfo, ResolveAddress,
+ * GetNextBlock, and GetBlock. This means that control returns to the caller
+ * with a relevant status code only after the completion of the operation (or
+ * the discovery of a failure condition).
+ *
+ * The remainder of the APIs: Initialize, Uninitialize, PowerControl, ReadData,
+ * ProgramData, Erase, EraseAll, can function asynchronously if the underlying
+ * controller supports it--i.e. if ARM_STORAGE_CAPABILITIES::asynchronous_ops is
+ * set. In the case of asynchronous operation, the invocation returns early
+ * (with ARM_DRIVER_OK) and results in a completion callback later. If
+ * ARM_STORAGE_CAPABILITIES::asynchronous_ops is not set, then all such APIs
+ * execute synchronously, and control returns to the caller with a status code
+ * only after the completion of the operation (or the discovery of a failure
+ * condition).
+ *
+ * If ARM_STORAGE_CAPABILITIES::asynchronous_ops is set, a storage driver may
+ * still choose to execute asynchronous operations in a synchronous manner. If
+ * so, the driver returns a positive value to indicate successful synchronous
+ * completion (or an error code in case of failure) and no further invocation of
+ * completion callback should be expected. The expected return value for
+ * synchronous completion of such asynchronous operations varies depending on
+ * the operation. For operations involving data access, it often equals the
+ * amount of data transferred or affected. For non data-transfer operations,
+ * such as EraseAll or Initialize, it is usually 1.
+ *
+ * Here's a code snippet to suggest how asynchronous APIs might be used by
+ * callers to handle both synchronous and asynchronous execution by the
+ * underlying storage driver:
+ * \code
+ *     ASSERT(ARM_DRIVER_OK == 0); // this is a precondition; it doesn't need to be put in code
+ *     int32_t returnValue = drv->asynchronousAPI(...);
+ *     if (returnValue < ARM_DRIVER_OK) {
+ *         // handle error.
+ *     } else if (returnValue == ARM_DRIVER_OK) {
+ *         ASSERT(drv->GetCapabilities().asynchronous_ops == 1);
+ *         // handle early return from asynchronous execution; remainder of the work is done in the callback handler.
+ *     } else {
+ *         ASSERT(returnValue == EXPECTED_RETURN_VALUE_FOR_SYNCHRONOUS_COMPLETION);
+ *         // handle synchronous completion.
+ *     }
+ * \endcode
+ */
+typedef struct _ARM_DRIVER_STORAGE {
+  /**
+   * \brief Get driver version.
+   *
+   * The function GetVersion() returns version information of the driver implementation in ARM_DRIVER_VERSION.
+   *
+   *    - API version is the version of the CMSIS-Driver specification used to implement this driver.
+   *    - Driver version is source code version of the actual driver implementation.
+   *
+   * Example:
+   * \code
+   *     extern ARM_DRIVER_STORAGE *drv_info;
+   *
+   *     void read_version (void)  {
+   *       ARM_DRIVER_VERSION  version;
+   *
+   *       version = drv_info->GetVersion ();
+   *       if (version.api < 0x10A)   {      // requires at minimum API version 1.10 or higher
+   *         // error handling
+   *         return;
+   *       }
+   *     }
+   * \endcode
+   *
+   * @return \ref ARM_DRIVER_VERSION.
+   *
+   * @note This API returns synchronously--it does not result in an invocation
+   *     of a completion callback.
+   *
+   * @note The function GetVersion() can be called any time to obtain the
+   *     required information from the driver (even before initialization). It
+   *     always returns the same information.
+   */
+  ARM_DRIVER_VERSION (*GetVersion)(void);
+
+  /**
+   * \brief Get driver capabilities.
+   *
+   * \details The function GetCapabilities() returns information about
+   * capabilities in this driver implementation. The data fields of the struct
+   * ARM_STORAGE_CAPABILITIES encode various capabilities, for example if the device
+   * is able to execute operations asynchronously.
+   *
+   * Example:
+   * \code
+   *     extern ARM_DRIVER_STORAGE *drv_info;
+   *
+   *     void read_capabilities (void)  {
+   *       ARM_STORAGE_CAPABILITIES drv_capabilities;
+   *
+   *       drv_capabilities = drv_info->GetCapabilities ();
+   *       // interrogate capabilities
+   *
+   *     }
+   * \endcode
+   *
+   * @return \ref ARM_STORAGE_CAPABILITIES.
+   *
+   * @note This API returns synchronously--it does not result in an invocation
+   *     of a completion callback.
+   *
+   * @note The function GetCapabilities() can be called any time to obtain the
+   *     required information from the driver (even before initialization). It
+   *     always returns the same information.
+   */
+  ARM_STORAGE_CAPABILITIES (*GetCapabilities)(void);
+
+  /**
+   * \brief Initialize the Storage Interface.
+   *
+   * The function Initialize is called when the middleware component starts
+   * operation. In addition to bringing the controller to a ready state,
+   * Initialize() receives a callback handler to be invoked upon completion of
+   * asynchronous operations.
+   *
+   * Initialize() needs to be called explicitly before
+   * powering the peripheral using PowerControl(), and before initiating other
+   * accesses to the storage controller.
+   *
+   * The function performs the following operations:
+   *   - Initializes the resources needed for the Storage interface.
+   *   - Registers the \ref ARM_Storage_Callback_t callback function.
+   *
+   * To start working with a peripheral the functions Initialize and PowerControl need to be called in this order:
+   *     drv->Initialize (...); // Allocate I/O pins
+   *     drv->PowerControl (ARM_POWER_FULL);        // Power up peripheral, setup IRQ/DMA
+   *
+   * - Initialize() typically allocates the I/O resources (pins) for the
+   *   peripheral. The function can be called multiple times; if the I/O resources
+   *   are already initialized it performs no operation and just returns with
+   *   ARM_DRIVER_OK.
+   *
+   * - PowerControl (ARM_POWER_FULL) sets the peripheral registers including
+   *   interrupt (NVIC) and optionally DMA. The function can be called multiple
+   *   times; if the registers are already set it performs no operation and just
+   *   returns with ARM_DRIVER_OK.
+   *
+   * To stop working with a peripheral the functions PowerControl and Uninitialize need to be called in this order:
+   *     drv->PowerControl (ARM_POWER_OFF);     // Terminate any pending transfers, reset IRQ/DMA, power off peripheral
+   *     drv->Uninitialize (...);               // Release I/O pins
+   *
+   * The functions PowerControl and Uninitialize always execute and can be used
+   * to put the peripheral into a Safe State, for example after any data
+   * transmission errors. To restart the peripheral in an error condition,
+   * you should first execute the Stop Sequence and then the Start Sequence.
+   *
+   * @param [in] callback
+   *               Caller-defined callback to be invoked upon command completion
+   *               for asynchronous APIs (including the completion of
+   *               initialization). Use a NULL pointer when no callback
+   *               signals are required.
+   *
+   * @note This API may execute asynchronously if
+   *     ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
+   *     execution is optional even if 'asynchronous_ops' is set.
+   *
+   * @return If asynchronous activity is launched, an invocation returns
+   *     ARM_DRIVER_OK, and the caller can expect to receive a callback in the
+   *     future with a status value of ARM_DRIVER_OK or an error-code. In the
+   *     case of synchronous execution, control returns after completion with a
+   *     value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
+   */
+  int32_t (*Initialize)(ARM_Storage_Callback_t callback);
+
+  /**
+   * \brief De-initialize the Storage Interface.
+   *
+   * The function Uninitialize() de-initializes the resources of Storage interface.
+   *
+   * It is called when the middleware component stops operation, and wishes to
+   * release the software resources used by the interface.
+   *
+   * @note This API may execute asynchronously if
+   *     ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
+   *     execution is optional even if 'asynchronous_ops' is set.
+   *
+   * @return If asynchronous activity is launched, an invocation returns
+   *     ARM_DRIVER_OK, and the caller can expect to receive a callback in the
+   *     future with a status value of ARM_DRIVER_OK or an error-code. In the
+   *     case of synchronous execution, control returns after completion with a
+   *     value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
+   */
+  int32_t (*Uninitialize)(void);
+
+  /**
+   * \brief Control the Storage interface power.
+   *
+   * The function \b ARM_Storage_PowerControl operates the power modes of the Storage interface.
+   *
+   * To start working with a peripheral the functions Initialize and PowerControl need to be called in this order:
+   *     drv->Initialize (...);                 // Allocate I/O pins
+   *     drv->PowerControl (ARM_POWER_FULL);    // Power up peripheral, setup IRQ/DMA
+   *
+   * - Initialize() typically allocates the I/O resources (pins) for the
+   *   peripheral. The function can be called multiple times; if the I/O resources
+   *   are already initialized it performs no operation and just returns with
+   *   ARM_DRIVER_OK.
+   *
+   * - PowerControl (ARM_POWER_FULL) sets the peripheral registers including
+   *   interrupt (NVIC) and optionally DMA. The function can be called multiple
+   *   times; if the registers are already set it performs no operation and just
+   *   returns with ARM_DRIVER_OK.
+   *
+   * To stop working with a peripheral the functions PowerControl and Uninitialize need to be called in this order:
+   *
+   *     drv->PowerControl (ARM_POWER_OFF);     // Terminate any pending transfers, reset IRQ/DMA, power off peripheral
+   *     drv->Uninitialize (...);               // Release I/O pins
+   *
+   * The functions PowerControl and Uninitialize always execute and can be used
+   * to put the peripheral into a Safe State, for example after any data
+   * transmission errors. To restart the peripheral in an error condition,
+   * you should first execute the Stop Sequence and then the Start Sequence.
+   *
+   * @param state
+   *          \ref ARM_POWER_STATE. The target power-state for the storage controller.
+   *          The parameter state can have the following values:
+   *              - ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts
+   *                                 (NVIC) and optionally DMA. Can be called multiple times. If the peripheral
+   *                                 is already in this mode, then the function performs no operation and returns
+   *                                 with ARM_DRIVER_OK.
+   *              - ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
+   *              - ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
+   *
+   * @note This API may execute asynchronously if
+   *     ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
+   *     execution is optional even if 'asynchronous_ops' is set.
+   *
+   * @return If asynchronous activity is launched, an invocation returns
+   *     ARM_DRIVER_OK, and the caller can expect to receive a callback in the
+   *     future with a status value of ARM_DRIVER_OK or an error-code. In the
+   *     case of synchronous execution, control returns after completion with a
+   *     value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
+   */
+  int32_t (*PowerControl)(ARM_POWER_STATE state);
+
+  /**
+   * \brief read the contents of a given address range from the storage device.
+   *
+   * \details Read the contents of a range of storage memory into a buffer
+   *   supplied by the caller. The buffer is owned by the caller and should
+   *   remain accessible for the lifetime of this command.
+   *
+   * @param  [in] addr
+   *                This specifies the address from where to read data.
+   *
+   * @param [out] data
+   *                The destination of the read operation. The buffer
+   *                is owned by the caller and should remain accessible for the
+   *                lifetime of this command.
+   *
+   * @param  [in] size
+   *                The number of bytes requested to read. The data buffer
+   *                should be at least as large as this size.
+   *
+   * @note This API may execute asynchronously if
+   *     ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
+   *     execution is optional even if 'asynchronous_ops' is set.
+   *
+   * @return If asynchronous activity is launched, an invocation returns
+   *     ARM_DRIVER_OK, and the caller can expect to receive a callback in the
+   *     future with the number of successfully transferred bytes passed in as
+   *     the 'status' parameter. In the case of synchronous execution, control
+   *     returns after completion with a positive transfer-count. Return values
+   *     less than ARM_DRIVER_OK (0) signify errors.
+   */
+  int32_t (*ReadData)(uint64_t addr, void *data, uint32_t size);
+
+  /**
+   * \brief program (write into) the contents of a given address range of the storage device.
+   *
+   * \details Write the contents of a given memory buffer into a range of
+   *   storage memory. In the case of flash memory, the destination range in
+   *   storage memory typically has its contents in an erased state from a
+   *   preceding erase operation. The source memory buffer is owned by the
+   *   caller and should remain accessible for the lifetime of this command.
+   *
+   * @param [in] addr
+   *               This is the start address of the range to be written into. It
+   *               needs to be aligned to the device's \em program_unit
+   *               specified in \ref ARM_STORAGE_INFO.
+   *
+   * @param [in] data
+   *               The source of the write operation. The buffer is owned by the
+   *               caller and should remain accessible for the lifetime of this
+   *               command.
+   *
+   * @param [in] size
+   *               The number of bytes requested to be written. The buffer
+   *               should be at least as large as this size. \note 'size' should
+   *               be a multiple of the device's 'program_unit' (see \ref
+   *               ARM_STORAGE_INFO).
+   *
+   * @note It is best for the middleware to write in units of
+   *     'optimal_program_unit' (\ref ARM_STORAGE_INFO) of the device.
+   *
+   * @note This API may execute asynchronously if
+   *     ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
+   *     execution is optional even if 'asynchronous_ops' is set.
+   *
+   * @return If asynchronous activity is launched, an invocation returns
+   *     ARM_DRIVER_OK, and the caller can expect to receive a callback in the
+   *     future with the number of successfully transferred bytes passed in as
+   *     the 'status' parameter. In the case of synchronous execution, control
+   *     returns after completion with a positive transfer-count. Return values
+   *     less than ARM_DRIVER_OK (0) signify errors.
+   */
+  int32_t (*ProgramData)(uint64_t addr, const void *data, uint32_t size);
+
+  /**
+   * @brief Erase Storage range.
+   *
+   * @details This function erases a range of storage specified by [addr, addr +
+   *     size). Both 'addr' and 'addr + size' should align with the
+   *     'erase_unit'(s) of the respective owning storage block(s) (see \ref
+   *     ARM_STORAGE_BLOCK and \ref ARM_STORAGE_BLOCK_ATTRIBUTES). The range to
+   *     be erased will have its contents returned to the un-programmed state--
+   *     i.e. to 'erased_value' (see \ref ARM_STORAGE_BLOCK_ATTRIBUTES), which
+   *     is usually 1 to indicate the pattern of all ones: 0xFF.
+   *
+   * @param [in] addr
+   *               This is the start-address of the range to be erased. It must
+   *               start at an 'erase_unit' boundary of the underlying block.
+   *
+   * @param [in] size
+   *               Size (in bytes) of the range to be erased. 'addr + size'
+   *               must be aligned with the 'erase_unit' of the underlying
+   *               block.
+   *
+   * @note This API may execute asynchronously if
+   *     ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
+   *     execution is optional even if 'asynchronous_ops' is set.
+   *
+   * @return
+   *   If the range to be erased doesn't align with the erase_units of the
+   *   respective start and end blocks, ARM_DRIVER_ERROR_PARAMETER is returned.
+   *   If any part of the range is protected, ARM_STORAGE_ERROR_PROTECTED is
+   *   returned. If any part of the range is not erasable,
+   *   ARM_STORAGE_ERROR_NOT_ERASABLE is returned. All such sanity-check
+   *   failures result in the error code being returned synchronously and the
+   *   storage bytes within the range remain unaffected.
+   *   Otherwise the function executes in the following ways:
+   *     If asynchronous activity is launched, an invocation returns
+   *     ARM_DRIVER_OK, and the caller can expect to receive a callback in the
+   *     future with the number of successfully erased bytes passed in as
+   *     the 'status' parameter. In the case of synchronous execution, control
+   *     returns after completion with a positive erase-count. Return values
+   *     less than ARM_DRIVER_OK (0) signify errors.
+   *
+   * @note Erase() may return a smaller (positive) value than the size of the
+   *     requested range. The returned value indicates the actual number of bytes
+   *     erased. It is the caller's responsibility to follow up with an appropriate
+   *     request to complete the operation.
+   *
+   * @note in the case of a failed erase (except when
+   *     ARM_DRIVER_ERROR_PARAMETER, ARM_STORAGE_ERROR_PROTECTED, or
+   *     ARM_STORAGE_ERROR_NOT_ERASABLE is returned synchronously), the
+   *     requested range should be assumed to be in an unknown state. The
+   *     previous contents may not be retained.
+   */
+  int32_t (*Erase)(uint64_t addr, uint32_t size);
+
+  /**
+   * @brief Erase complete storage. Optional function for faster erase of the complete device.
+   *
+   * This optional function erases the complete device. If the device does not
+   *    support global erase then the function returns the error value \ref
+   *    ARM_DRIVER_ERROR_UNSUPPORTED. The data field \em 'erase_all' =
+   *    \token{1} of the structure \ref ARM_STORAGE_CAPABILITIES encodes that
+   *    \ref ARM_STORAGE_EraseAll is supported.
+   *
+   * @note This API may execute asynchronously if
+   *     ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous
+   *     execution is optional even if 'asynchronous_ops' is set.
+   *
+   * @return
+   *   If any part of the storage range is protected,
+   *   ARM_STORAGE_ERROR_PROTECTED is returned. If any part of the storage
+   *   range is not erasable, ARM_STORAGE_ERROR_NOT_ERASABLE is returned. All
+   *   such sanity-check failures result in the error code being returned
+   *   synchronously and the storage bytes within the range remain unaffected.
+   *   Otherwise the function executes in the following ways:
+   *     If asynchronous activity is launched, an invocation returns
+   *     ARM_DRIVER_OK, and the caller can expect to receive a callback in the
+   *     future with ARM_DRIVER_OK passed in as the 'status' parameter. In the
+   *     case of synchronous execution, control returns after completion with a
+   *     value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
+   */
+  int32_t (*EraseAll)(void);
+
+  /**
+   * @brief Get the status of the current (or previous) command executed by the
+   *     storage controller; stored in the structure \ref ARM_STORAGE_STATUS.
+   *
+   * @return
+   *          The status of the underlying controller.
+   *
+   * @note This API returns synchronously--it does not result in an invocation
+   *     of a completion callback.
+   */
+  ARM_STORAGE_STATUS (*GetStatus)(void);
+
+  /**
+   * @brief Get information about the Storage device; stored in the structure \ref ARM_STORAGE_INFO.
+   *
+   * @param [out] info
+   *                A caller-supplied buffer capable of being filled in with an
+   *                \ref ARM_STORAGE_INFO.
+   *
+   * @return ARM_DRIVER_OK if a ARM_STORAGE_INFO structure containing top level
+   *         metadata about the storage controller is filled into the supplied
+   *         buffer, else an appropriate error value.
+   *
+   * @note It is the caller's responsibility to ensure that the buffer passed in
+   *         is able to be initialized with a \ref ARM_STORAGE_INFO.
+   *
+   * @note This API returns synchronously--it does not result in an invocation
+   *     of a completion callback.
+   */
+  int32_t (*GetInfo)(ARM_STORAGE_INFO *info);
+
+  /**
+   * \brief For memory-mapped storage, resolve an address relative to
+   *     the storage controller into a memory address.
+   *
+   * @param addr
+   *          This is the address for which we want a resolution to the
+   *          processor's physical address space. It is an offset from the
+   *          start of the storage map maintained by the owning storage
+   *          controller.
+   *
+   * @return
+   *          The resolved address in the processor's address space; else
+   *          ARM_STORAGE_INVALID_ADDRESS, if no resolution is possible.
+   *
+   * @note This API returns synchronously. The invocation should return quickly,
+   *     and result in a resolved address.
+   */
+  uint32_t (*ResolveAddress)(uint64_t addr);
+
+  /**
+   * @brief Advance to the successor of the current block (iterator), or fetch
+   *     the first block (if 'prev_block' is passed in as NULL).
+   *
+   * @details This helper function fetches (an iterator to) the next block (or
+   *     the first block if 'prev_block' is passed in as NULL). In the failure
+   *     case, a terminating, invalid block iterator is filled into the out
+   *     parameter: 'next_block'. In combination with \ref
+   *     ARM_STORAGE_VALID_BLOCK(), it can be used to iterate over the sequence
+   *     of blocks within the storage map:
+   *
+   * \code
+   *   ARM_STORAGE_BLOCK block;
+   *   for (drv->GetNextBlock(NULL, &block); ARM_STORAGE_VALID_BLOCK(&block); drv->GetNextBlock(&block, &block)) {
+   *       // make use of block
+   *   }
+   * \endcode
+   *
+   * @param[in]  prev_block
+   *               An existing block (iterator) within the same storage
+   *               controller. The memory buffer holding this block is owned
+   *               by the caller. This pointer may be NULL; if so, the
+   *               invocation fills in the first block into the out parameter:
+   *               'next_block'.
+   *
+   * @param[out] next_block
+   *               A caller-owned buffer large enough to be filled in with
+   *               the following ARM_STORAGE_BLOCK. It is legal to provide the
+   *               same buffer using 'next_block' as was passed in with 'prev_block'. It
+   *               is also legal to pass a NULL into this parameter if the
+   *               caller isn't interested in populating a buffer with the next
+   *               block--i.e. if the caller only wishes to establish the
+   *               presence of a next block.
+   *
+   * @return ARM_DRIVER_OK if a valid next block is found (or first block, if
+   *     prev_block is passed as NULL); upon successful operation, the contents
+   *     of the next (or first) block are filled into the buffer pointed to by
+   *     the parameter 'next_block' and ARM_STORAGE_VALID_BLOCK(next_block) is
+   *     guaranteed to be true. Upon reaching the end of the sequence of blocks
+   *     (iterators), or in case the driver is unable to fetch information about
+   *     the next (or first) block, an error (negative) value is returned and an
+   *     invalid StorageBlock is populated into the supplied buffer. If
+   *     prev_block is NULL, the first block is returned.
+   *
+   * @note This API returns synchronously--it does not result in an invocation
+   *     of a completion callback.
+   */
+   int32_t (*GetNextBlock)(const ARM_STORAGE_BLOCK* prev_block, ARM_STORAGE_BLOCK *next_block);
+
+  /**
+   * @brief Find the storage block (iterator) encompassing a given storage address.
+   *
+   * @param[in]  addr
+   *               Storage address in bytes.
+   *
+   * @param[out] block
+   *               A caller-owned buffer large enough to be filled in with the
+   *               ARM_STORAGE_BLOCK encapsulating the given address. This value
+   *               can also be passed in as NULL if the caller isn't interested
+   *               in populating a buffer with the block--if the caller only
+   *               wishes to establish the presence of a containing storage
+   *               block.
+   *
+   * @return ARM_DRIVER_OK if a containing storage-block is found. In this case,
+   *     if block is non-NULL, the buffer pointed to by it is populated with
+   *     the contents of the storage block--i.e. if block is valid and a block is
+   *     found, ARM_STORAGE_VALID_BLOCK(block) would return true following this
+   *     call. If there is no storage block containing the given offset, or in
+   *     case the driver is unable to resolve an address to a storage-block, an
+   *     error (negative) value is returned and an invalid StorageBlock is
+   *     populated into the supplied buffer.
+   *
+   * @note This API returns synchronously--it does not result in an invocation
+   *     of a completion callback.
+   */
+  int32_t (*GetBlock)(uint64_t addr, ARM_STORAGE_BLOCK *block);
+} const ARM_DRIVER_STORAGE;
+
+#ifdef __cplusplus
+}
+#endif // __cplusplus
+
+#endif /* __DRIVER_STORAGE_H */
+
+/** @}*/
diff --git a/mbed/hal/analogin_api.h b/mbed/hal/analogin_api.h
new file mode 100644
index 0000000..56b05eb
--- /dev/null
+++ b/mbed/hal/analogin_api.h
@@ -0,0 +1,71 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_ANALOGIN_API_H
+#define MBED_ANALOGIN_API_H
+
+#include "device.h"
+
+#if DEVICE_ANALOGIN
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Analogin hal structure. analogin_s is declared in the target's hal
+ */
+typedef struct analogin_s analogin_t;
+
+/**
+ * \defgroup hal_analogin Analogin hal functions
+ * @{
+ */
+
+/** Initialize the analogin peripheral
+ *
+ * Configures the pin used by analogin.
+ * @param obj The analogin object to initialize
+ * @param pin The analogin pin name
+ */
+void analogin_init(analogin_t *obj, PinName pin);
+
+/** Read the input voltage, represented as a float in the range [0.0, 1.0]
+ *
+ * @param obj The analogin object
+ * @return A floating value representing the current input voltage
+ */
+float analogin_read(analogin_t *obj);
+
+/** Read the value from analogin pin, represented as an unsigned 16bit value
+ *
+ * @param obj The analogin object
+ * @return An unsigned 16bit value representing the current input voltage
+ */
+uint16_t analogin_read_u16(analogin_t *obj);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/analogout_api.h b/mbed/hal/analogout_api.h
new file mode 100644
index 0000000..e0ab614
--- /dev/null
+++ b/mbed/hal/analogout_api.h
@@ -0,0 +1,93 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_ANALOGOUT_API_H
+#define MBED_ANALOGOUT_API_H
+
+#include "device.h"
+
+#if DEVICE_ANALOGOUT
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Analogout hal structure. dac_s is declared in the target's hal
+ */
+typedef struct dac_s dac_t;
+
+/**
+ * \defgroup hal_analogout Analogout hal functions
+ * @{
+ */
+
+/** Initialize the analogout peripheral
+ *
+ * Configures the pin used by analogout.
+ * @param obj The analogout object to initialize
+ * @param pin The analogout pin name
+ */
+void analogout_init(dac_t *obj, PinName pin);
+
+/** Release the analogout object
+ *
+ * Note: This is not currently used in the mbed-drivers
+ * @param obj The analogout object
+ */
+void analogout_free(dac_t *obj);
+
+/** Set the output voltage, specified as a percentage (float)
+ *
+ * @param obj The analogin object
+ * @param value The floating-point output voltage to be set
+ */
+void analogout_write(dac_t *obj, float value);
+
+/** Set the output voltage, specified as unsigned 16-bit
+ *
+ * @param obj The analogin object
+ * @param value The unsigned 16-bit output voltage to be set
+ */
+void analogout_write_u16(dac_t *obj, uint16_t value);
+
+/** Read the current voltage value on the pin
+ *
+ * @param obj The analogin object
+ * @return A floating-point value representing the current voltage on the pin,
+ *     measured as a percentage
+ */
+float analogout_read(dac_t *obj);
+
+/** Read the current voltage value on the pin, as a normalized unsigned 16bit value
+ *
+ * @param obj The analogin object
+ * @return An unsigned 16-bit value representing the current voltage on the pin
+ */
+uint16_t analogout_read_u16(dac_t *obj);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/buffer.h b/mbed/hal/buffer.h
new file mode 100644
index 0000000..60e1020
--- /dev/null
+++ b/mbed/hal/buffer.h
@@ -0,0 +1,35 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2014-2015 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_BUFFER_H
+#define MBED_BUFFER_H
+
+#include <stddef.h>
+
+/** Generic buffer structure
+ */
+typedef struct buffer_s {
+    void    *buffer; /**< the pointer to a buffer */
+    size_t   length; /**< the buffer length */
+    size_t   pos;    /**< actual buffer position */
+    uint8_t  width;  /**< The buffer unit width (8, 16, 32, 64), used for proper *buffer casting */
+} buffer_t;
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/can_api.h b/mbed/hal/can_api.h
new file mode 100644
index 0000000..d8fc0d8
--- /dev/null
+++ b/mbed/hal/can_api.h
@@ -0,0 +1,85 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2016 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_CAN_API_H
+#define MBED_CAN_API_H
+
+#include "device.h"
+
+#if DEVICE_CAN
+
+#include "PinNames.h"
+#include "PeripheralNames.h"
+#include "hal/can_helper.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    IRQ_RX,
+    IRQ_TX,
+    IRQ_ERROR,
+    IRQ_OVERRUN,
+    IRQ_WAKEUP,
+    IRQ_PASSIVE,
+    IRQ_ARB,
+    IRQ_BUS,
+    IRQ_READY
+} CanIrqType;
+
+
+typedef enum {
+    MODE_RESET,
+    MODE_NORMAL,
+    MODE_SILENT,
+    MODE_TEST_LOCAL,
+    MODE_TEST_GLOBAL,
+    MODE_TEST_SILENT
+} CanMode;
+
+typedef void (*can_irq_handler)(uint32_t id, CanIrqType type);
+
+typedef struct can_s can_t;
+
+void          can_init     (can_t *obj, PinName rd, PinName td);
+void          can_free     (can_t *obj);
+int           can_frequency(can_t *obj, int hz);
+
+void          can_irq_init (can_t *obj, can_irq_handler handler, uint32_t id);
+void          can_irq_free (can_t *obj);
+void          can_irq_set  (can_t *obj, CanIrqType irq, uint32_t enable);
+
+int           can_write    (can_t *obj, CAN_Message, int cc);
+int           can_read     (can_t *obj, CAN_Message *msg, int handle);
+int           can_mode     (can_t *obj, CanMode mode);
+int           can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle);
+void          can_reset    (can_t *obj);
+unsigned char can_rderror  (can_t *obj);
+unsigned char can_tderror  (can_t *obj);
+void          can_monitor  (can_t *obj, int silent);
+
+#ifdef __cplusplus
+};
+#endif
+
+#endif    // MBED_CAN_API_H
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/can_helper.h b/mbed/hal/can_helper.h
new file mode 100644
index 0000000..5074ce6
--- /dev/null
+++ b/mbed/hal/can_helper.h
@@ -0,0 +1,58 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_CAN_HELPER_H
+#define MBED_CAN_HELPER_H
+
+#if DEVICE_CAN
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum CANFormat {
+    CANStandard = 0,
+    CANExtended = 1,
+    CANAny = 2
+};
+typedef enum CANFormat CANFormat;
+
+enum CANType {
+    CANData   = 0,
+    CANRemote = 1
+};
+typedef enum CANType CANType;
+
+struct CAN_Message {
+    unsigned int   id;                 // 29 bit identifier
+    unsigned char  data[8];            // Data field
+    unsigned char  len;                // Length of data field in bytes
+    CANFormat      format;             // 0 - STANDARD, 1- EXTENDED IDENTIFIER
+    CANType        type;               // 0 - DATA FRAME, 1 - REMOTE FRAME
+};
+typedef struct CAN_Message CAN_Message;
+
+#ifdef __cplusplus
+};
+#endif
+
+#endif
+
+#endif // MBED_CAN_HELPER_H
+
+/** @}*/
diff --git a/mbed/hal/dma_api.h b/mbed/hal/dma_api.h
new file mode 100644
index 0000000..8096409
--- /dev/null
+++ b/mbed/hal/dma_api.h
@@ -0,0 +1,50 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2014-2015 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_DMA_API_H
+#define MBED_DMA_API_H
+
+#include <stdint.h>
+
+#define DMA_ERROR_OUT_OF_CHANNELS (-1)
+
+typedef enum {
+    DMA_USAGE_NEVER,
+    DMA_USAGE_OPPORTUNISTIC,
+    DMA_USAGE_ALWAYS,
+    DMA_USAGE_TEMPORARY_ALLOCATED,
+    DMA_USAGE_ALLOCATED
+} DMAUsage;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void dma_init(void);
+
+int dma_channel_allocate(uint32_t capabilities);
+
+int dma_channel_free(int channelid);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/emac_api.h b/mbed/hal/emac_api.h
new file mode 100644
index 0000000..d4a5e2a
--- /dev/null
+++ b/mbed/hal/emac_api.h
@@ -0,0 +1,160 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2016 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_EMAC_API_H
+#define MBED_EMAC_API_H
+
+#if DEVICE_EMAC
+
+#include <stdbool.h>
+#include "emac_stack_mem.h"
+
+typedef struct emac_interface emac_interface_t;
+
+/**
+ * EmacInterface
+ *
+ * This interface should be used to abstract low level access to networking hardware
+ */
+
+/**
+ * Callback to be register with Emac interface and to be called fore received packets
+ *
+ * @param data Arbitrary user data (IP stack)
+ * @param buf  Received data
+ */
+typedef void (*emac_link_input_fn)(void *data, emac_stack_mem_chain_t *buf);
+
+/**
+ * Callback to be register with Emac interface and to be called for link status changes
+ *
+ * @param  data Arbitrary user data (IP stack)
+ * @param  up   Link status
+ */
+typedef void (*emac_link_state_change_fn)(void *data, bool up);
+
+/**
+ * Return maximum transmission unit
+ *
+ * @param emac Emac interface
+ * @return     MTU in bytes
+ */
+typedef uint32_t (*emac_get_mtu_size_fn)(emac_interface_t *emac);
+
+/**
+ * Return interface name
+ *
+ * @param emac Emac interface
+ * @param name Pointer to where the name should be written
+ * @param size Maximum number of character to copy
+ */
+typedef void (*emac_get_ifname_fn)(emac_interface_t *emac, char *name, uint8_t size);
+
+/**
+ * Returns size of the underlying interface HW address size
+ *
+ * @param emac Emac interface
+ * @return     HW address size in bytes
+ */
+typedef uint8_t (*emac_get_hwaddr_size_fn)(emac_interface_t *emac);
+
+/**
+ * Return interface hw address
+ *
+ * Copies HW address to provided memory, @param addr has to be of correct size see @a get_hwaddr_size
+ *
+ * @param emac Emac interface
+ * @param addr HW address for underlying interface
+ */
+typedef void (*emac_get_hwaddr_fn)(emac_interface_t *emac, uint8_t *addr);
+
+/**
+ * Set HW address for interface
+ *
+ * Provided address has to be of correct size, see @a get_hwaddr_size
+ *
+ * @param emac Emac interface
+ * @param addr Address to be set
+ */
+typedef void (*emac_set_hwaddr_fn)(emac_interface_t *emac, uint8_t *addr);
+
+/**
+ * Sends the packet over the link
+ *
+ * That can not be called from an interrupt context.
+ *
+ * @param emac Emac interface
+ * @param buf  Packet to be send
+ * @return     True if the packet was send successfully, False otherwise
+ */
+typedef bool (*emac_link_out_fn)(emac_interface_t *emac, emac_stack_mem_t *buf);
+
+/**
+ * Initializes the HW
+ *
+ * @return True on success, False in case of an error.
+ */
+typedef bool (*emac_power_up_fn)(emac_interface_t *emac);
+
+/**
+ * Deinitializes the HW
+ *
+ * @param emac Emac interface
+ */
+typedef void (*emac_power_down_fn)(emac_interface_t *emac);
+
+/**
+ * Sets a callback that needs to be called for packets received for that interface
+ *
+ * @param emac     Emac interface
+ * @param input_cb Function to be register as a callback
+ * @param data     Arbitrary user data to be passed to the callback
+ */
+typedef void (*emac_set_link_input_cb_fn)(emac_interface_t *emac, emac_link_input_fn input_cb, void *data);
+
+/**
+ * Sets a callback that needs to be called on link status changes for given interface
+ *
+ * @param emac     Emac interface
+ * @param state_cb Function to be register as a callback
+ * @param data Arbitrary user data to be passed to the callback
+ */
+typedef void (*emac_set_link_state_cb_fn)(emac_interface_t *emac, emac_link_state_change_fn state_cb, void *data);
+
+typedef struct emac_interface_ops {
+    emac_get_mtu_size_fn        get_mtu_size;
+    emac_get_ifname_fn          get_ifname;
+    emac_get_hwaddr_size_fn     get_hwaddr_size;
+    emac_get_hwaddr_fn          get_hwaddr;
+    emac_set_hwaddr_fn          set_hwaddr;
+    emac_link_out_fn            link_out;
+    emac_power_up_fn            power_up;
+    emac_power_down_fn          power_down;
+    emac_set_link_input_cb_fn   set_link_input_cb;
+    emac_set_link_state_cb_fn   set_link_state_cb;
+} emac_interface_ops_t;
+
+typedef struct emac_interface {
+    const emac_interface_ops_t ops;
+    void *hw;
+} emac_interface_t;
+
+#else
+
+typedef void *emac_interface_t;
+
+#endif /* DEVICE_EMAC */
+#endif  /* MBED_EMAC_API_H */
diff --git a/mbed/hal/ethernet_api.h b/mbed/hal/ethernet_api.h
new file mode 100644
index 0000000..60130cc
--- /dev/null
+++ b/mbed/hal/ethernet_api.h
@@ -0,0 +1,68 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_ETHERNET_API_H
+#define MBED_ETHERNET_API_H
+
+#include "device.h"
+
+#if DEVICE_ETHERNET
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Connection constants
+
+int ethernet_init(void);
+void ethernet_free(void);
+
+// write size bytes from data to ethernet buffer
+// return num bytes written
+// or -1 if size is too big
+int ethernet_write(const char *data, int size);
+
+// send ethernet write buffer, returning the packet size sent
+int ethernet_send(void);
+
+// recieve from ethernet buffer, returning packet size, or 0 if no packet
+int ethernet_receive(void);
+
+// read size bytes in to data, return actual num bytes read (0..size)
+// if data == NULL, throw the bytes away
+int ethernet_read(char *data, int size);
+
+// get the ethernet address
+void ethernet_address(char *mac);
+
+// see if the link is up
+int ethernet_link(void);
+
+// force link settings
+void ethernet_set_link(int speed, int duplex);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+
+/** @}*/
diff --git a/mbed/hal/flash_api.h b/mbed/hal/flash_api.h
new file mode 100644
index 0000000..e7be146
--- /dev/null
+++ b/mbed/hal/flash_api.h
@@ -0,0 +1,119 @@
+/** \addtogroup hal */
+/** @{*/
+
+/* mbed Microcontroller Library
+ * Copyright (c) 2017 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_FLASH_API_H
+#define MBED_FLASH_API_H
+
+#include "device.h"
+#include <stdint.h>
+
+#if DEVICE_FLASH
+
+#define MBED_FLASH_INVALID_SIZE     0xFFFFFFFF
+
+typedef struct flash_s flash_t;
+
+#if TARGET_FLASH_CMSIS_ALGO
+#include "flash_data.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup flash_hal Flash HAL API
+ * @{
+ */
+
+/** Initialize the flash peripheral and the flash_t object
+ * 
+ * @param obj The flash object
+ * @return 0 for success, -1 for error
+ */
+int32_t flash_init(flash_t *obj);
+
+/** Uninitialize the flash peripheral and the flash_t object
+ * 
+ * @param obj The flash object
+ * @return 0 for success, -1 for error
+ */
+int32_t flash_free(flash_t *obj);
+
+/** Erase one sector starting at defined address
+ *
+ * The address should be at sector boundary. This function does not do any check for address alignments
+ * @param obj The flash object
+ * @param address The sector starting address
+ * @return 0 for success, -1 for error
+ */
+int32_t flash_erase_sector(flash_t *obj, uint32_t address);
+
+/** Program one page starting at defined address
+ * 
+ * The page should be at page boundary, should not cross multiple sectors. 
+ * This function does not do any check for address alignments or if size is aligned to a page size.
+ * @param obj The flash object
+ * @param address The sector starting address
+ * @param data The data buffer to be programmed
+ * @param size The number of bytes to program
+ * @return 0 for success, -1 for error
+ */
+int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size);
+
+/** Get sector size
+ * 
+ * @param obj The flash object
+ * @param address The sector starting address
+ * @return The size of a sector
+ */
+uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address);
+
+/** Get page size
+ * 
+ * @param obj The flash object
+ * @param address The page starting address
+ * @return The size of a page
+ */
+uint32_t flash_get_page_size(const flash_t *obj);
+
+/** Get start address for the flash region
+ * 
+ * @param obj The flash object
+ * @return The start address for the flash region
+ */
+uint32_t flash_get_start_address(const flash_t *obj);
+
+/** Get the flash region size
+ * 
+ * @param obj The flash object
+ * @return The flash region size
+ */
+uint32_t flash_get_size(const flash_t *obj);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/flash_data.h b/mbed/hal/flash_data.h
new file mode 100644
index 0000000..48d1347
--- /dev/null
+++ b/mbed/hal/flash_data.h
@@ -0,0 +1,83 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2017 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_FLASH_DATA_H
+#define MBED_FLASH_DATA_H
+
+#include <stdint.h>
+
+// Target flash algorithm structure
+typedef struct {
+    const uint32_t init;
+    const uint32_t uninit;
+    const uint32_t erase_sector;
+    const uint32_t program_page;
+    const uint32_t static_base;
+    uint32_t *algo_blob;
+} flash_algo_t;
+
+typedef struct {
+    const uint32_t start;
+    const uint32_t size;
+} sector_info_t;
+
+typedef struct {
+    const uint32_t page_size;
+    const uint32_t flash_start;
+    const uint32_t flash_size;
+    const sector_info_t *sectors;
+    const uint32_t sector_info_count;
+} flash_target_config_t;
+
+// Target flash configuration
+struct flash_s {
+    const flash_target_config_t *target_config;
+    const flash_algo_t *flash_algo;
+};
+
+typedef struct {
+    uint32_t r0;
+    uint32_t r1;
+    uint32_t r2;
+    uint32_t r3;
+    uint32_t r9;
+    uint32_t pc;
+} args_t;
+
+typedef int32_t (*flash_algo_jump_t)(args_t*);
+
+// prototypes for flash algo CMSIS API
+
+typedef int (*CMSIS_Algo_Function_Init)(unsigned long adr, unsigned long clk, unsigned long fnc);
+typedef int (*CMSIS_Algo_Function_UnInit)(unsigned long fnc);
+typedef int (*CMSIS_Algo_Function_EraseSector)(unsigned long adr);
+typedef int (*CMSIS_Algo_Function_EraseChip)(void);
+typedef int (*CMSIS_Algo_Function_ProgramPage)(unsigned long adr, unsigned long sz, unsigned char *buf);
+typedef unsigned long (*CMSIS_Algo_Function_Verify)(unsigned long adr, unsigned long sz, unsigned char *buf);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Set target configuration
+ */
+void flash_set_target_config(flash_t *obj);
+
+#ifdef __cplusplus
+};
+#endif
+
+
+#endif
diff --git a/mbed/hal/gpio_api.h b/mbed/hal/gpio_api.h
new file mode 100644
index 0000000..3bf5b1d
--- /dev/null
+++ b/mbed/hal/gpio_api.h
@@ -0,0 +1,133 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_GPIO_API_H
+#define MBED_GPIO_API_H
+
+#include <stdint.h>
+#include "device.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup hal_gpio GPIO HAL functions
+ * @{
+ */
+
+/** Set the given pin as GPIO
+ *
+ * @param pin The pin to be set as GPIO
+ * @return The GPIO port mask for this pin
+ **/
+uint32_t gpio_set(PinName pin);
+/* Checks if gpio object is connected (pin was not initialized with NC)
+ * @param pin The pin to be set as GPIO
+ * @return 0 if port is initialized with NC
+ **/
+int gpio_is_connected(const gpio_t *obj);
+
+/** Initialize the GPIO pin
+ *
+ * @param obj The GPIO object to initialize
+ * @param pin The GPIO pin to initialize
+ */
+void gpio_init(gpio_t *obj, PinName pin);
+
+/** Set the input pin mode
+ *
+ * @param obj  The GPIO object
+ * @param mode The pin mode to be set
+ */
+void gpio_mode(gpio_t *obj, PinMode mode);
+
+/** Set the pin direction
+ *
+ * @param obj       The GPIO object
+ * @param direction The pin direction to be set
+ */
+void gpio_dir(gpio_t *obj, PinDirection direction);
+
+/** Set the output value
+ *
+ * @param obj   The GPIO object
+ * @param value The value to be set
+ */
+void gpio_write(gpio_t *obj, int value);
+
+/** Read the input value
+ *
+ * @param obj The GPIO object
+ * @return An integer value 1 or 0
+ */
+int gpio_read(gpio_t *obj);
+
+// the following functions are generic and implemented in the common gpio.c file
+// TODO: fix, will be moved to the common gpio header file
+
+/** Init the input pin and set mode to PullDefault
+ *
+ * @param obj The GPIO object
+ * @param pin The pin name
+ */
+void gpio_init_in(gpio_t* gpio, PinName pin);
+
+/** Init the input pin and set the mode
+ *
+ * @param obj  The GPIO object
+ * @param pin  The pin name
+ * @param mode The pin mode to be set
+ */
+void gpio_init_in_ex(gpio_t* gpio, PinName pin, PinMode mode);
+
+/** Init the output pin as an output, with predefined output value 0
+ *
+ * @param obj The GPIO object
+ * @param pin The pin name
+ * @return An integer value 1 or 0
+ */
+void gpio_init_out(gpio_t* gpio, PinName pin);
+
+/** Init the pin as an output and set the output value
+ *
+ * @param obj   The GPIO object
+ * @param pin   The pin name
+ * @param value The value to be set
+ */
+void gpio_init_out_ex(gpio_t* gpio, PinName pin, int value);
+
+/** Init the pin to be in/out
+ *
+ * @param obj       The GPIO object
+ * @param pin       The pin name
+ * @param direction The pin direction to be set
+ * @param mode      The pin mode to be set
+ * @param value     The value to be set for an output pin
+ */
+void gpio_init_inout(gpio_t* gpio, PinName pin, PinDirection direction, PinMode mode, int value);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/gpio_irq_api.h b/mbed/hal/gpio_irq_api.h
new file mode 100644
index 0000000..60d1b35
--- /dev/null
+++ b/mbed/hal/gpio_irq_api.h
@@ -0,0 +1,97 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_GPIO_IRQ_API_H
+#define MBED_GPIO_IRQ_API_H
+
+#include "device.h"
+
+#if DEVICE_INTERRUPTIN
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** GPIO IRQ events
+ */
+typedef enum {
+    IRQ_NONE,
+    IRQ_RISE,
+    IRQ_FALL
+} gpio_irq_event;
+
+/** GPIO IRQ HAL structure. gpio_irq_s is declared in the target's HAL
+ */
+typedef struct gpio_irq_s gpio_irq_t;
+
+typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event);
+
+/**
+ * \defgroup hal_gpioirq GPIO IRQ HAL functions
+ * @{
+ */
+
+/** Initialize the GPIO IRQ pin
+ *
+ * @param obj     The GPIO object to initialize
+ * @param pin     The GPIO pin name
+ * @param handler The handler to be attached to GPIO IRQ
+ * @param id      The object ID (id != 0, 0 is reserved)
+ * @return -1 if pin is NC, 0 otherwise
+ */
+int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id);
+
+/** Release the GPIO IRQ PIN
+ *
+ * @param obj The gpio object
+ */
+void gpio_irq_free(gpio_irq_t *obj);
+
+/** Enable/disable pin IRQ event
+ *
+ * @param obj    The GPIO object
+ * @param event  The GPIO IRQ event
+ * @param enable The enable flag
+ */
+void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable);
+
+/** Enable GPIO IRQ
+ *
+ * This is target dependent, as it might enable the entire port or just a pin
+ * @param obj The GPIO object
+ */
+void gpio_irq_enable(gpio_irq_t *obj);
+
+/** Disable GPIO IRQ
+ *
+ * This is target dependent, as it might disable the entire port or just a pin
+ * @param obj The GPIO object
+ */
+void gpio_irq_disable(gpio_irq_t *obj);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/i2c_api.h b/mbed/hal/i2c_api.h
new file mode 100644
index 0000000..1f01f52
--- /dev/null
+++ b/mbed/hal/i2c_api.h
@@ -0,0 +1,248 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2015 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_I2C_API_H
+#define MBED_I2C_API_H
+
+#include "device.h"
+#include "hal/buffer.h"
+
+#if DEVICE_I2C_ASYNCH
+#include "hal/dma_api.h"
+#endif
+
+#if DEVICE_I2C
+
+/**
+ * @defgroup hal_I2CEvents I2C Events Macros
+ *
+ * @{
+ */
+#define I2C_EVENT_ERROR               (1 << 1)
+#define I2C_EVENT_ERROR_NO_SLAVE      (1 << 2)
+#define I2C_EVENT_TRANSFER_COMPLETE   (1 << 3)
+#define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
+#define I2C_EVENT_ALL                 (I2C_EVENT_ERROR |  I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
+
+/**@}*/
+
+#if DEVICE_I2C_ASYNCH
+/** Asynch I2C HAL structure
+ */
+typedef struct {
+    struct i2c_s    i2c;     /**< Target specific I2C structure */
+    struct buffer_s tx_buff; /**< Tx buffer */
+    struct buffer_s rx_buff; /**< Rx buffer */
+} i2c_t;
+
+#else
+/** Non-asynch I2C HAL structure
+ */
+typedef struct i2c_s i2c_t;
+
+#endif
+
+enum {
+  I2C_ERROR_NO_SLAVE = -1,
+  I2C_ERROR_BUS_BUSY = -2
+};
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup hal_GeneralI2C I2C Configuration Functions
+ * @{
+ */
+
+/** Initialize the I2C peripheral. It sets the default parameters for I2C
+ *  peripheral, and configures its specifieds pins.
+ *  
+ *  @param obj  The I2C object
+ *  @param sda  The sda pin
+ *  @param scl  The scl pin
+ */
+void i2c_init(i2c_t *obj, PinName sda, PinName scl);
+
+/** Configure the I2C frequency
+ *
+ *  @param obj The I2C object
+ *  @param hz  Frequency in Hz
+ */
+void i2c_frequency(i2c_t *obj, int hz);
+
+/** Send START command
+ *
+ *  @param obj The I2C object
+ */
+int  i2c_start(i2c_t *obj);
+
+/** Send STOP command
+ *
+ *  @param obj The I2C object
+ */
+int  i2c_stop(i2c_t *obj);
+
+/** Blocking reading data
+ *
+ *  @param obj     The I2C object
+ *  @param address 7-bit address (last bit is 1)
+ *  @param data    The buffer for receiving
+ *  @param length  Number of bytes to read
+ *  @param stop    Stop to be generated after the transfer is done
+ *  @return Number of read bytes
+ */
+int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
+
+/** Blocking sending data
+ *
+ *  @param obj     The I2C object
+ *  @param address 7-bit address (last bit is 0)
+ *  @param data    The buffer for sending
+ *  @param length  Number of bytes to write
+ *  @param stop    Stop to be generated after the transfer is done
+ *  @return 
+ *      zero or non-zero - Number of written bytes
+ *      negative - I2C_ERROR_XXX status
+ */
+int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
+
+/** Reset I2C peripheral. TODO: The action here. Most of the implementation sends stop()
+ *
+ *  @param obj The I2C object
+ */
+void i2c_reset(i2c_t *obj);
+
+/** Read one byte
+ *
+ *  @param obj The I2C object
+ *  @param last Acknoledge
+ *  @return The read byte
+ */
+int i2c_byte_read(i2c_t *obj, int last);
+
+/** Write one byte
+ *
+ *  @param obj The I2C object
+ *  @param data Byte to be written
+ *  @return 0 if NAK was received, 1 if ACK was received, 2 for timeout.
+ */
+int i2c_byte_write(i2c_t *obj, int data);
+
+/**@}*/
+
+#if DEVICE_I2CSLAVE
+
+/**
+ * \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
+ * @{
+ */
+
+/** Configure I2C as slave or master.
+ *  @param obj The I2C object
+ *  @return non-zero if a value is available
+ */
+void i2c_slave_mode(i2c_t *obj, int enable_slave);
+
+/** Check to see if the I2C slave has been addressed.
+ *  @param obj The I2C object
+ *  @return The status - 1 - read addresses, 2 - write to all slaves,
+ *         3 write addressed, 0 - the slave has not been addressed
+ */
+int  i2c_slave_receive(i2c_t *obj);
+
+/** Configure I2C as slave or master.
+ *  @param obj The I2C object
+ *  @return non-zero if a value is available
+ */
+int  i2c_slave_read(i2c_t *obj, char *data, int length);
+
+/** Configure I2C as slave or master.
+ *  @param obj The I2C object
+ *  @return non-zero if a value is available
+ */
+int  i2c_slave_write(i2c_t *obj, const char *data, int length);
+
+/** Configure I2C address.
+ *  @param obj     The I2C object
+ *  @param idx     Currently not used
+ *  @param address The address to be set
+ *  @param mask    Currently not used
+ */
+void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
+
+#endif
+
+/**@}*/
+
+#if DEVICE_I2C_ASYNCH
+
+/**
+ * \defgroup hal_AsynchI2C Asynchronous I2C Hardware Abstraction Layer
+ * @{
+ */
+
+/** Start I2C asynchronous transfer
+ *
+ *  @param obj       The I2C object
+ *  @param tx        The transmit buffer
+ *  @param tx_length The number of bytes to transmit
+ *  @param rx        The receive buffer
+ *  @param rx_length The number of bytes to receive
+ *  @param address   The address to be set - 7bit or 9bit
+ *  @param stop      If true, stop will be generated after the transfer is done
+ *  @param handler   The I2C IRQ handler to be set
+ *  @param hint      DMA hint usage
+ */
+void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint);
+
+/** The asynchronous IRQ handler
+ *
+ *  @param obj The I2C object which holds the transfer information
+ *  @return Event flags if a transfer termination condition was met, otherwise return 0.
+ */
+uint32_t i2c_irq_handler_asynch(i2c_t *obj);
+
+/** Attempts to determine if the I2C peripheral is already in use
+ *
+ *  @param obj The I2C object
+ *  @return Non-zero if the I2C module is active or zero if it is not
+ */
+uint8_t i2c_active(i2c_t *obj);
+
+/** Abort asynchronous transfer
+ *
+ *  This function does not perform any check - that should happen in upper layers.
+ *  @param obj The I2C object
+ */
+void i2c_abort_asynch(i2c_t *obj);
+
+#endif
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/lp_ticker_api.h b/mbed/hal/lp_ticker_api.h
new file mode 100644
index 0000000..5318d35
--- /dev/null
+++ b/mbed/hal/lp_ticker_api.h
@@ -0,0 +1,87 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2015 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_LPTICKER_API_H
+#define MBED_LPTICKER_API_H
+
+#include "device.h"
+
+#if DEVICE_LOWPOWERTIMER
+
+#include "hal/ticker_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup hal_LpTicker Low Power Ticker Functions
+ * @{
+ */
+
+/** Get low power ticker's data
+ *
+ * @return The low power ticker data
+ */
+const ticker_data_t* get_lp_ticker_data(void);
+
+/** The wrapper for ticker_irq_handler, to pass lp ticker's data
+ *
+ */
+void lp_ticker_irq_handler(void);
+
+/* HAL lp ticker */
+
+/** Initialize the low power ticker
+ *
+ */
+void lp_ticker_init(void);
+
+/** Read the current counter
+ *
+ * @return The current timer's counter value in microseconds
+ */
+uint32_t lp_ticker_read(void);
+
+/** Set interrupt for specified timestamp
+ *
+ * @param timestamp The time in microseconds to be set
+ */
+void lp_ticker_set_interrupt(timestamp_t timestamp);
+
+/** Disable low power ticker interrupt
+ *
+ */
+void lp_ticker_disable_interrupt(void);
+
+/** Clear the low power ticker interrupt
+ *
+ */
+void lp_ticker_clear_interrupt(void);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/pinmap.h b/mbed/hal/pinmap.h
new file mode 100644
index 0000000..b1bee82
--- /dev/null
+++ b/mbed/hal/pinmap.h
@@ -0,0 +1,50 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PINMAP_H
+#define MBED_PINMAP_H
+
+#include "PinNames.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    PinName pin;
+    int peripheral;
+    int function;
+} PinMap;
+
+void pin_function(PinName pin, int function);
+void pin_mode    (PinName pin, PinMode mode);
+
+uint32_t pinmap_peripheral(PinName pin, const PinMap* map);
+uint32_t pinmap_function(PinName pin, const PinMap* map);
+uint32_t pinmap_merge     (uint32_t a, uint32_t b);
+void     pinmap_pinout    (PinName pin, const PinMap *map);
+uint32_t pinmap_find_peripheral(PinName pin, const PinMap* map);
+uint32_t pinmap_find_function(PinName pin, const PinMap* map);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/port_api.h b/mbed/hal/port_api.h
new file mode 100644
index 0000000..ca56520
--- /dev/null
+++ b/mbed/hal/port_api.h
@@ -0,0 +1,93 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PORTMAP_H
+#define MBED_PORTMAP_H
+
+#include "device.h"
+
+#if DEVICE_PORTIN || DEVICE_PORTOUT
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Port HAL structure. port_s is declared in the target's HAL
+ */
+typedef struct port_s port_t;
+
+/**
+ * \defgroup hal_port Port HAL functions
+ * @{
+ */
+
+/** Get the pin name from the port's pin number
+ *
+ * @param port  The port name
+ * @param pin_n The pin number within the specified port
+ * @return The pin name for the port's pin number
+ */
+PinName port_pin(PortName port, int pin_n);
+
+/** Initilize the port
+ *
+ * @param obj  The port object to initialize
+ * @param port The port name
+ * @param mask The bitmask to identify which bits in the port should be included (0 - ignore)
+ * @param dir  The port direction
+ */
+void port_init(port_t *obj, PortName port, int mask, PinDirection dir);
+
+/** Set the input port mode
+ *
+ * @param obj  The port object
+ * @param mode THe port mode to be set
+ */
+void port_mode(port_t *obj, PinMode mode);
+
+/** Set port direction (in/out)
+ *
+ * @param obj The port object
+ * @param dir The port direction to be set
+ */
+void port_dir(port_t *obj, PinDirection dir);
+
+/** Write value to the port
+ *
+ * @param obj   The port object
+ * @param value The value to be set
+ */
+void port_write(port_t *obj, int value);
+
+/** Read the current value on the port
+ *
+ * @param obj The port object
+ * @return An integer with each bit corresponding to an associated port pin setting
+ */
+int port_read(port_t *obj);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/pwmout_api.h b/mbed/hal/pwmout_api.h
new file mode 100644
index 0000000..ab2701c
--- /dev/null
+++ b/mbed/hal/pwmout_api.h
@@ -0,0 +1,120 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PWMOUT_API_H
+#define MBED_PWMOUT_API_H
+
+#include "device.h"
+
+#if DEVICE_PWMOUT
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Pwmout hal structure. pwmout_s is declared in the target's hal
+ */
+typedef struct pwmout_s pwmout_t;
+
+/**
+ * \defgroup hal_pwmout Pwmout hal functions
+ * @{
+ */
+
+/** Initialize the pwm out peripheral and configure the pin
+ *
+ * @param obj The pwmout object to initialize
+ * @param pin The pwmout pin to initialize
+ */
+void pwmout_init(pwmout_t *obj, PinName pin);
+
+/** Deinitialize the pwmout object
+ *
+ * @param obj The pwmout object
+ */
+void pwmout_free(pwmout_t *obj);
+
+/** Set the output duty-cycle in range <0.0f, 1.0f>
+ *
+ * Value 0.0f represents 0 percentage, 1.0f represents 100 percent.
+ * @param obj     The pwmout object
+ * @param percent The floating-point percentage number
+ */
+void pwmout_write(pwmout_t *obj, float percent);
+
+/** Read the current float-point output duty-cycle
+ *
+ * @param obj The pwmout object
+ * @return A floating-point output duty-cycle
+ */
+float pwmout_read(pwmout_t *obj);
+
+/** Set the PWM period specified in seconds, keeping the duty cycle the same
+ *
+ * Periods smaller than microseconds (the lowest resolution) are set to zero.
+ * @param obj     The pwmout object
+ * @param seconds The floating-point seconds period
+ */
+void pwmout_period(pwmout_t *obj, float seconds);
+
+/** Set the PWM period specified in miliseconds, keeping the duty cycle the same
+ *
+ * @param obj The pwmout object
+ * @param ms  The milisecond period
+ */
+void pwmout_period_ms(pwmout_t *obj, int ms);
+
+/** Set the PWM period specified in microseconds, keeping the duty cycle the same
+ *
+ * @param obj The pwmout object
+ * @param us  The microsecond period
+ */
+void pwmout_period_us(pwmout_t *obj, int us);
+
+/** Set the PWM pulsewidth specified in seconds, keeping the period the same.
+ *
+ * @param obj     The pwmout object
+ * @param seconds The floating-point pulsewidth in seconds
+ */
+void pwmout_pulsewidth(pwmout_t *obj, float seconds);
+
+/** Set the PWM pulsewidth specified in miliseconds, keeping the period the same.
+ *
+ * @param obj The pwmout object
+ * @param ms  The floating-point pulsewidth in miliseconds
+ */
+void pwmout_pulsewidth_ms(pwmout_t *obj, int ms);
+
+/** Set the PWM pulsewidth specified in microseconds, keeping the period the same.
+ *
+ * @param obj The pwmout object
+ * @param us  The floating-point pulsewidth in microseconds
+ */
+void pwmout_pulsewidth_us(pwmout_t *obj, int us);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/rtc_api.h b/mbed/hal/rtc_api.h
new file mode 100644
index 0000000..00010fc
--- /dev/null
+++ b/mbed/hal/rtc_api.h
@@ -0,0 +1,77 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_RTC_API_H
+#define MBED_RTC_API_H
+
+#include "device.h"
+
+#if DEVICE_RTC
+
+#include <time.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup hal_rtc RTC hal functions
+ * @{
+ */
+
+/** Initialize the RTC peripheral
+ *
+ */
+void rtc_init(void);
+
+/** Deinitialize RTC
+ *
+ * TODO: The function is not used by rtc api in mbed-drivers.
+ */
+void rtc_free(void);
+
+/** Get the RTC enable status
+ *
+ * @retval 0 disabled
+ * @retval 1 enabled
+ */
+int rtc_isenabled(void);
+
+/** Get the current time from the RTC peripheral
+ *
+ * @return The current time
+ */
+time_t rtc_read(void);
+
+/** Set the current time to the RTC peripheral
+ *
+ * @param t The current time to be set
+ */
+void rtc_write(time_t t);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/serial_api.h b/mbed/hal/serial_api.h
new file mode 100644
index 0000000..ec84e65
--- /dev/null
+++ b/mbed/hal/serial_api.h
@@ -0,0 +1,307 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_SERIAL_API_H
+#define MBED_SERIAL_API_H
+
+#include "device.h"
+#include "hal/buffer.h"
+#include "hal/dma_api.h"
+
+#if DEVICE_SERIAL
+
+#define SERIAL_EVENT_TX_SHIFT (2)
+#define SERIAL_EVENT_RX_SHIFT (8)
+
+#define SERIAL_EVENT_TX_MASK (0x00FC)
+#define SERIAL_EVENT_RX_MASK (0x3F00)
+
+#define SERIAL_EVENT_ERROR (1 << 1)
+
+/**
+ * @defgroup SerialTXEvents Serial TX Events Macros
+ *
+ * @{
+ */
+#define SERIAL_EVENT_TX_COMPLETE (1 << (SERIAL_EVENT_TX_SHIFT + 0))
+#define SERIAL_EVENT_TX_ALL      (SERIAL_EVENT_TX_COMPLETE)
+/**@}*/
+
+/**
+ * @defgroup SerialRXEvents Serial RX Events Macros
+ *
+ * @{
+ */
+#define SERIAL_EVENT_RX_COMPLETE        (1 << (SERIAL_EVENT_RX_SHIFT + 0))
+#define SERIAL_EVENT_RX_OVERRUN_ERROR   (1 << (SERIAL_EVENT_RX_SHIFT + 1))
+#define SERIAL_EVENT_RX_FRAMING_ERROR   (1 << (SERIAL_EVENT_RX_SHIFT + 2))
+#define SERIAL_EVENT_RX_PARITY_ERROR    (1 << (SERIAL_EVENT_RX_SHIFT + 3))
+#define SERIAL_EVENT_RX_OVERFLOW        (1 << (SERIAL_EVENT_RX_SHIFT + 4))
+#define SERIAL_EVENT_RX_CHARACTER_MATCH (1 << (SERIAL_EVENT_RX_SHIFT + 5))
+#define SERIAL_EVENT_RX_ALL             (SERIAL_EVENT_RX_OVERFLOW | SERIAL_EVENT_RX_PARITY_ERROR | \
+                                         SERIAL_EVENT_RX_FRAMING_ERROR | SERIAL_EVENT_RX_OVERRUN_ERROR | \
+                                         SERIAL_EVENT_RX_COMPLETE | SERIAL_EVENT_RX_CHARACTER_MATCH)
+/**@}*/
+
+#define SERIAL_RESERVED_CHAR_MATCH (255)
+
+typedef enum {
+    ParityNone = 0,
+    ParityOdd = 1,
+    ParityEven = 2,
+    ParityForced1 = 3,
+    ParityForced0 = 4
+} SerialParity;
+
+typedef enum {
+    RxIrq,
+    TxIrq
+} SerialIrq;
+
+typedef enum {
+    FlowControlNone,
+    FlowControlRTS,
+    FlowControlCTS,
+    FlowControlRTSCTS
+} FlowControl;
+
+typedef void (*uart_irq_handler)(uint32_t id, SerialIrq event);
+
+#if DEVICE_SERIAL_ASYNCH
+/** Asynch serial HAL structure
+ */
+typedef struct {
+    struct serial_s serial;  /**< Target specific serial structure */
+    struct buffer_s tx_buff; /**< TX buffer */
+    struct buffer_s rx_buff; /**< RX buffer */
+    uint8_t char_match;      /**< Character to be matched */
+    uint8_t char_found;      /**< State of the matched character */
+} serial_t;
+
+#else
+/** Non-asynch serial HAL structure
+ */
+typedef struct serial_s serial_t;
+
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup hal_GeneralSerial Serial Configuration Functions
+ * @{
+ */
+
+/** Initialize the serial peripheral. It sets the default parameters for serial
+ *  peripheral, and configures its specifieds pins.
+ *
+ * @param obj The serial object
+ * @param tx  The TX pin name
+ * @param rx  The RX pin name
+ */
+void serial_init(serial_t *obj, PinName tx, PinName rx);
+
+/** Release the serial peripheral, not currently invoked. It requires further
+ *  resource management.
+ *
+ * @param obj The serial object
+ */
+void serial_free(serial_t *obj);
+
+/** Configure the baud rate
+ *
+ * @param obj      The serial object
+ * @param baudrate The baud rate to be configured
+ */
+void serial_baud(serial_t *obj, int baudrate);
+
+/** Configure the format. Set the number of bits, parity and the number of stop bits
+ *
+ * @param obj       The serial object
+ * @param data_bits The number of data bits
+ * @param parity    The parity
+ * @param stop_bits The number of stop bits
+ */
+void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits);
+
+/** The serial interrupt handler registration
+ *
+ * @param obj     The serial object
+ * @param handler The interrupt handler which will be invoked when the interrupt fires
+ * @param id      The SerialBase object
+ */
+void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id);
+
+/** Configure serial interrupt. This function is used for word-approach
+ *
+ * @param obj    The serial object
+ * @param irq    The serial IRQ type (RX or TX)
+ * @param enable Set to non-zero to enable events, or zero to disable them
+ */
+void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable);
+
+/** Get character. This is a blocking call, waiting for a character
+ *
+ * @param obj The serial object
+ */
+int  serial_getc(serial_t *obj);
+
+/** Send a character. This is a blocking call, waiting for a peripheral to be available
+ *  for writing
+ *
+ * @param obj The serial object
+ * @param c   The character to be sent
+ */
+void serial_putc(serial_t *obj, int c);
+
+/** Check if the serial peripheral is readable
+ *
+ * @param obj The serial object
+ * @return Non-zero value if a character can be read, 0 if nothing to read
+ */
+int  serial_readable(serial_t *obj);
+
+/** Check if the serial peripheral is writable
+ *
+ * @param obj The serial object
+ * @return Non-zero value if a character can be written, 0 otherwise.
+ */
+int  serial_writable(serial_t *obj);
+
+/** Clear the serial peripheral
+ *
+ * @param obj The serial object
+ */
+void serial_clear(serial_t *obj);
+
+/** Set the break
+ *
+ * @param obj The serial object
+ */
+void serial_break_set(serial_t *obj);
+
+/** Clear the break
+ *
+ * @param obj The serial object
+ */
+void serial_break_clear(serial_t *obj);
+
+/** Configure the TX pin for UART function.
+ *
+ * @param tx The pin name used for TX
+ */
+void serial_pinout_tx(PinName tx);
+
+/** Configure the serial for the flow control. It sets flow control in the hardware
+ *  if a serial peripheral supports it, otherwise software emulation is used.
+ *
+ * @param obj    The serial object
+ * @param type   The type of the flow control. Look at the available FlowControl types.
+ * @param rxflow The TX pin name
+ * @param txflow The RX pin name
+ */
+void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow);
+
+#if DEVICE_SERIAL_ASYNCH
+
+/**@}*/
+
+/**
+ * \defgroup hal_AsynchSerial Asynchronous Serial Hardware Abstraction Layer
+ * @{
+ */
+
+/** Begin asynchronous TX transfer. The used buffer is specified in the serial object,
+ *  tx_buff
+ *
+ * @param obj       The serial object
+ * @param tx        The transmit buffer
+ * @param tx_length The number of bytes to transmit
+ * @param tx_width  Deprecated argument
+ * @param handler   The serial handler
+ * @param event     The logical OR of events to be registered
+ * @param hint      A suggestion for how to use DMA with this transfer
+ * @return Returns number of data transfered, otherwise returns 0
+ */
+int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint);
+
+/** Begin asynchronous RX transfer (enable interrupt for data collecting)
+ *  The used buffer is specified in the serial object - rx_buff
+ *
+ * @param obj        The serial object
+ * @param rx         The receive buffer
+ * @param rx_length  The number of bytes to receive
+ * @param rx_width   Deprecated argument
+ * @param handler    The serial handler
+ * @param event      The logical OR of events to be registered
+ * @param handler    The serial handler
+ * @param char_match A character in range 0-254 to be matched
+ * @param hint       A suggestion for how to use DMA with this transfer
+ */
+void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint);
+
+/** Attempts to determine if the serial peripheral is already in use for TX
+ *
+ * @param obj The serial object
+ * @return Non-zero if the RX transaction is ongoing, 0 otherwise
+ */
+uint8_t serial_tx_active(serial_t *obj);
+
+/** Attempts to determine if the serial peripheral is already in use for RX
+ *
+ * @param obj The serial object
+ * @return Non-zero if the RX transaction is ongoing, 0 otherwise
+ */
+uint8_t serial_rx_active(serial_t *obj);
+
+/** The asynchronous TX and RX handler.
+ *
+ * @param obj The serial object
+ * @return Returns event flags if an RX transfer termination condition was met; otherwise returns 0
+ */
+int serial_irq_handler_asynch(serial_t *obj);
+
+/** Abort the ongoing TX transaction. It disables the enabled interupt for TX and
+ *  flushes the TX hardware buffer if TX FIFO is used
+ *
+ * @param obj The serial object
+ */
+void serial_tx_abort_asynch(serial_t *obj);
+
+/** Abort the ongoing RX transaction. It disables the enabled interrupt for RX and
+ *  flushes the RX hardware buffer if RX FIFO is used
+ *
+ * @param obj The serial object
+ */
+void serial_rx_abort_asynch(serial_t *obj);
+
+/**@}*/
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/sleep_api.h b/mbed/hal/sleep_api.h
new file mode 100644
index 0000000..55914b5
--- /dev/null
+++ b/mbed/hal/sleep_api.h
@@ -0,0 +1,69 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_SLEEP_API_H
+#define MBED_SLEEP_API_H
+
+#include "device.h"
+
+#if DEVICE_SLEEP
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Send the microcontroller to sleep
+ *
+ * The processor is setup ready for sleep, and sent to sleep using __WFI(). In this mode, the
+ * system clock to the core is stopped until a reset or an interrupt occurs. This eliminates
+ * dynamic power used by the processor, memory systems and buses. The processor, peripheral and
+ * memory state are maintained, and the peripherals continue to work and can generate interrupts.
+ *
+ * The processor can be woken up by any internal peripheral interrupt or external pin interrupt.
+ *
+ * @note
+ *  The mbed interface semihosting is disconnected as part of going to sleep, and can not be restored.
+ * Flash re-programming and the USB serial port will remain active, but the mbed program will no longer be
+ * able to access the LocalFileSystem
+ */
+void hal_sleep(void);
+
+/** Send the microcontroller to deep sleep
+ *
+ * This processor is setup ready for deep sleep, and sent to sleep using __WFI(). This mode
+ * has the same sleep features as sleep plus it powers down peripherals and clocks. All state
+ * is still maintained.
+ *
+ * The processor can only be woken up by an external interrupt on a pin or a watchdog timer.
+ *
+ * @note
+ *  The mbed interface semihosting is disconnected as part of going to sleep, and can not be restored.
+ * Flash re-programming and the USB serial port will remain active, but the mbed program will no longer be
+ * able to access the LocalFileSystem
+ */
+void hal_deepsleep(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/spi_api.h b/mbed/hal/spi_api.h
new file mode 100644
index 0000000..dd418e7
--- /dev/null
+++ b/mbed/hal/spi_api.h
@@ -0,0 +1,219 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_SPI_API_H
+#define MBED_SPI_API_H
+
+#include "device.h"
+#include "hal/dma_api.h"
+#include "hal/buffer.h"
+
+#if DEVICE_SPI
+
+#define SPI_EVENT_ERROR       (1 << 1)
+#define SPI_EVENT_COMPLETE    (1 << 2)
+#define SPI_EVENT_RX_OVERFLOW (1 << 3)
+#define SPI_EVENT_ALL         (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
+
+#define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
+
+#define SPI_FILL_WORD         (0xFFFF)
+
+#if DEVICE_SPI_ASYNCH
+/** Asynch SPI HAL structure
+ */
+typedef struct {
+    struct spi_s spi;        /**< Target specific SPI structure */
+    struct buffer_s tx_buff; /**< Tx buffer */
+    struct buffer_s rx_buff; /**< Rx buffer */
+} spi_t;
+
+#else
+/** Non-asynch SPI HAL structure
+ */
+typedef struct spi_s spi_t;
+
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup hal_GeneralSPI SPI Configuration Functions
+ * @{
+ */
+
+/** Initialize the SPI peripheral
+ *
+ * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
+ * @param[out] obj  The SPI object to initialize
+ * @param[in]  mosi The pin to use for MOSI
+ * @param[in]  miso The pin to use for MISO
+ * @param[in]  sclk The pin to use for SCLK
+ * @param[in]  ssel The pin to use for SSEL
+ */
+void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
+
+/** Release a SPI object
+ *
+ * TODO: spi_free is currently unimplemented
+ * This will require reference counting at the C++ level to be safe
+ *
+ * Return the pins owned by the SPI object to their reset state
+ * Disable the SPI peripheral
+ * Disable the SPI clock
+ * @param[in] obj The SPI object to deinitialize
+ */
+void spi_free(spi_t *obj);
+
+/** Configure the SPI format
+ *
+ * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
+ * The default bit order is MSB.
+ * @param[in,out] obj   The SPI object to configure
+ * @param[in]     bits  The number of bits per frame
+ * @param[in]     mode  The SPI mode (clock polarity, phase, and shift direction)
+ * @param[in]     slave Zero for master mode or non-zero for slave mode
+ */
+void spi_format(spi_t *obj, int bits, int mode, int slave);
+
+/** Set the SPI baud rate
+ *
+ * Actual frequency may differ from the desired frequency due to available dividers and bus clock
+ * Configures the SPI peripheral's baud rate
+ * @param[in,out] obj The SPI object to configure
+ * @param[in]     hz  The baud rate in Hz
+ */
+void spi_frequency(spi_t *obj, int hz);
+
+/**@}*/
+/**
+ * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
+ * @{
+ */
+
+/** Write a byte out in master mode and receive a value
+ *
+ * @param[in] obj   The SPI peripheral to use for sending
+ * @param[in] value The value to send
+ * @return Returns the value received during send
+ */
+int  spi_master_write(spi_t *obj, int value);
+
+/** Check if a value is available to read
+ *
+ * @param[in] obj The SPI peripheral to check
+ * @return non-zero if a value is available
+ */
+int  spi_slave_receive(spi_t *obj);
+
+/** Get a received value out of the SPI receive buffer in slave mode
+ *
+ * Blocks until a value is available
+ * @param[in] obj The SPI peripheral to read
+ * @return The value received
+ */
+int  spi_slave_read(spi_t *obj);
+
+/** Write a value to the SPI peripheral in slave mode
+ *
+ * Blocks until the SPI peripheral can be written to
+ * @param[in] obj   The SPI peripheral to write
+ * @param[in] value The value to write
+ */
+void spi_slave_write(spi_t *obj, int value);
+
+/** Checks if the specified SPI peripheral is in use
+ *
+ * @param[in] obj The SPI peripheral to check
+ * @return non-zero if the peripheral is currently transmitting
+ */
+int  spi_busy(spi_t *obj);
+
+/** Get the module number
+ *
+ * @param[in] obj The SPI peripheral to check
+ * @return The module number
+ */
+uint8_t spi_get_module(spi_t *obj);
+
+/**@}*/
+
+#if DEVICE_SPI_ASYNCH
+/**
+ * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
+ * @{
+ */
+
+/** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
+ *
+ * @param[in] obj       The SPI object that holds the transfer information
+ * @param[in] tx        The transmit buffer
+ * @param[in] tx_length The number of bytes to transmit
+ * @param[in] rx        The receive buffer
+ * @param[in] rx_length The number of bytes to receive
+ * @param[in] bit_width The bit width of buffer words
+ * @param[in] event     The logical OR of events to be registered
+ * @param[in] handler   SPI interrupt handler
+ * @param[in] hint      A suggestion for how to use DMA with this transfer
+ */
+void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
+
+/** The asynchronous IRQ handler
+ *
+ * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
+ * conditions, such as buffer overflows or transfer complete.
+ * @param[in] obj     The SPI object that holds the transfer information
+ * @return Event flags if a transfer termination condition was met; otherwise 0.
+ */
+uint32_t spi_irq_handler_asynch(spi_t *obj);
+
+/** Attempts to determine if the SPI peripheral is already in use
+ *
+ * If a temporary DMA channel has been allocated, peripheral is in use.
+ * If a permanent DMA channel has been allocated, check if the DMA channel is in use.  If not, proceed as though no DMA
+ * channel were allocated.
+ * If no DMA channel is allocated, check whether tx and rx buffers have been assigned.  For each assigned buffer, check
+ * if the corresponding buffer position is less than the buffer length.  If buffers do not indicate activity, check if
+ * there are any bytes in the FIFOs.
+ * @param[in] obj The SPI object to check for activity
+ * @return Non-zero if the SPI port is active or zero if it is not.
+ */
+uint8_t spi_active(spi_t *obj);
+
+/** Abort an SPI transfer
+ *
+ * @param obj The SPI peripheral to stop
+ */
+void spi_abort_asynch(spi_t *obj);
+
+
+#endif
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif // __cplusplus
+
+#endif // SPI_DEVICE
+
+#endif // MBED_SPI_API_H
+
+/** @}*/
diff --git a/mbed/hal/ticker_api.h b/mbed/hal/ticker_api.h
new file mode 100644
index 0000000..917a391
--- /dev/null
+++ b/mbed/hal/ticker_api.h
@@ -0,0 +1,121 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2015 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_TICKER_API_H
+#define MBED_TICKER_API_H
+
+#include <stdint.h>
+#include "device.h"
+
+typedef uint32_t timestamp_t;
+
+/** Ticker's event structure
+ */
+typedef struct ticker_event_s {
+    timestamp_t            timestamp; /**< Event's timestamp */
+    uint32_t               id;        /**< TimerEvent object */
+    struct ticker_event_s *next;      /**< Next event in the queue */
+} ticker_event_t;
+
+typedef void (*ticker_event_handler)(uint32_t id);
+
+/** Ticker's interface structure - required API for a ticker
+ */
+typedef struct {
+    void (*init)(void);                           /**< Init function */
+    uint32_t (*read)(void);                       /**< Read function */
+    void (*disable_interrupt)(void);              /**< Disable interrupt function */
+    void (*clear_interrupt)(void);                /**< Clear interrupt function */
+    void (*set_interrupt)(timestamp_t timestamp); /**< Set interrupt function */
+} ticker_interface_t;
+
+/** Ticker's event queue structure
+ */
+typedef struct {
+    ticker_event_handler event_handler; /**< Event handler */
+    ticker_event_t *head;               /**< A pointer to head */
+} ticker_event_queue_t;
+
+/** Ticker's data structure
+ */
+typedef struct {
+    const ticker_interface_t *interface; /**< Ticker's interface */
+    ticker_event_queue_t *queue;         /**< Ticker's event queue */
+} ticker_data_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup hal_ticker Ticker HAL functions
+ * @{
+ */
+
+/** Initialize a ticker and set the event handler
+ *
+ * @param data    The ticker's data
+ * @param handler A handler to be set
+ */
+void ticker_set_handler(const ticker_data_t *const data, ticker_event_handler handler);
+
+/** IRQ handler that goes through the events to trigger overdue events.
+ *
+ * @param data    The ticker's data
+ */
+void ticker_irq_handler(const ticker_data_t *const data);
+
+/** Remove an event from the queue
+ *
+ * @param data The ticker's data
+ * @param obj  The event object to be removed from the queue
+ */
+void ticker_remove_event(const ticker_data_t *const data, ticker_event_t *obj);
+
+/** Insert an event to the queue
+ *
+ * @param data      The ticker's data
+ * @param obj       The event object to be inserted to the queue
+ * @param timestamp The event's timestamp
+ * @param id        The event object
+ */
+void ticker_insert_event(const ticker_data_t *const data, ticker_event_t *obj, timestamp_t timestamp, uint32_t id);
+
+/** Read the current ticker's timestamp
+ *
+ * @param data The ticker's data
+ * @return The current timestamp
+ */
+timestamp_t ticker_read(const ticker_data_t *const data);
+
+/** Read the next event's timestamp
+ *
+ * @param data The ticker's data
+ * @return 1 if timestamp is pending event, 0 if there's no event pending
+ */
+int ticker_get_next_timestamp(const ticker_data_t *const data, timestamp_t *timestamp);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/trng_api.h b/mbed/hal/trng_api.h
new file mode 100644
index 0000000..0346d6f
--- /dev/null
+++ b/mbed/hal/trng_api.h
@@ -0,0 +1,72 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2016 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_TRNG_API_H
+#define MBED_TRNG_API_H
+
+#include <stddef.h>
+#include "device.h"
+
+#if DEVICE_TRNG
+
+/** TRNG HAL structure. trng_s is declared in the target's HAL
+ */
+typedef struct trng_s trng_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup hal_trng TRNG hal functions
+ * @{
+ */
+
+/** Initialize the TRNG peripheral
+ *
+ * @param obj The TRNG object
+ */
+void trng_init(trng_t *obj);
+
+/** Deinitialize the TRNG peripheral
+ *
+ * @param obj The TRNG object
+ */
+void trng_free(trng_t *obj);
+
+/** Get random data from TRNG peripheral
+ *
+ * @param obj The TRNG object
+ * @param output The pointer to an output array
+ * @param length The size of output data, to avoid buffer overwrite
+ * @param output_length The length of generated data
+ * @return 0 success, -1 fail
+ */
+int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_length);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/** @}*/
diff --git a/mbed/hal/us_ticker_api.h b/mbed/hal/us_ticker_api.h
new file mode 100644
index 0000000..4c671d1
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@@ -0,0 +1,83 @@
+
+/** \addtogroup hal */
+/** @{*/
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2015 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_US_TICKER_API_H
+#define MBED_US_TICKER_API_H
+
+#include <stdint.h>
+#include "hal/ticker_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \defgroup hal_UsTicker Microseconds Ticker Functions
+ * @{
+ */
+
+/** Get ticker's data
+ *
+ * @return The low power ticker data
+ */
+const ticker_data_t* get_us_ticker_data(void);
+
+
+/** The wrapper for ticker_irq_handler, to pass us ticker's data
+ *
+ */
+void us_ticker_irq_handler(void);
+
+/* HAL us ticker */
+
+/** Initialize the ticker
+ *
+ */
+void us_ticker_init(void);
+
+/** Read the current counter
+ *
+ * @return The current timer's counter value in microseconds
+ */
+uint32_t us_ticker_read(void);
+
+/** Set interrupt for specified timestamp
+ *
+ * @param timestamp The time in microseconds to be set
+ */
+void us_ticker_set_interrupt(timestamp_t timestamp);
+
+/** Disable us ticker interrupt
+ *
+ */
+void us_ticker_disable_interrupt(void);
+
+/** Clear us ticker interrupt
+ *
+ */
+void us_ticker_clear_interrupt(void);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/** @}*/
author	Yann Herklotz <ymherklotz@gmail.com>	2017-05-10 13:17:31 +0100
committer	Yann Herklotz <ymherklotz@gmail.com>	2017-05-10 13:17:31 +0100
commit	aa30a51f3e2d9120aa819c1bc8162793662ccf32 (patch)
tree	e7659204b1ecf3f65fae106c12b096fd552c2d8d /mbed/hal
download	WaveGenerator-aa30a51f3e2d9120aa819c1bc8162793662ccf32.tar.gz WaveGenerator-aa30a51f3e2d9120aa819c1bc8162793662ccf32.zip