diff options
| author | zedarider <ymherklotz@gmail.com> | 2016-02-26 21:40:24 +0000 |
|---|---|---|
| committer | zedarider <ymherklotz@gmail.com> | 2016-02-26 21:40:24 +0000 |
| commit | 6d8f08b4727e5630e547d0afbf39c819a43945f6 (patch) | |
| tree | 1f3fcb0185e339aa7cd7a14ece31c4fa474de9a1 /ARM_assembly/MultProject/README.txt | |
| parent | 110c42733ff3decdb62bc4347626489a2677d99b (diff) | |
| download | imperial_2015-6d8f08b4727e5630e547d0afbf39c819a43945f6.tar.gz imperial_2015-6d8f08b4727e5630e547d0afbf39c819a43945f6.zip | |
Adding ARM Assembly files
Diffstat (limited to 'ARM_assembly/MultProject/README.txt')
| -rw-r--r-- | ARM_assembly/MultProject/README.txt | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/ARM_assembly/MultProject/README.txt b/ARM_assembly/MultProject/README.txt new file mode 100644 index 0000000..906697b --- /dev/null +++ b/ARM_assembly/MultProject/README.txt @@ -0,0 +1,21 @@ +testbench-opt1.s
+
+Testbench for opt1 code with test data.
+To test your code:
+(1) Paste your solution (subroutine SMUL64X64) into VisUAL after the testbench code.
+(2) Run the code.
+(3) On successful termination of all tests R0 = 123
+
+Otherwise:
+R0 = -1 (data out error in one of the tests, R5 contains test number)
+R0 = -2 (your code works OK but changes R4-R12 which is not allowed)
+
+If your code fully passes this testbench it will fully pass my "correctness" mark. In this case you pass the pseudo-code mark as well and obtain at least 50% for the project mark.
+
+If your code partially passes this testbench (e.g. it stops at negative numbers) you will still get some part of the code mark. In this case your pseudo-code description will be separately marked.
+
+
+
+test64x64.py (NOT NEEDED FOR NORMAL TESTING)
+Python script (runs under Python 2.7) in case you want to generate NEW test data for the testbench. Will not normally be needed.
+
|