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* Merge branch 'kvx-work' of gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCer...David Monniaux2021-09-013-5/+107
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| * cleanupLéo Gourdin2021-09-011-9/+0
| * Merge remote-tracking branch 'origin/kvx-work' into kvx-workLéo Gourdin2021-09-015-89/+24
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| * \ [MERGE] BTL into kvx-work (replacing RTLpath)Léo Gourdin2021-09-013-5/+116
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| | * \ Merge branch 'kvx-work' into BTLLéo Gourdin2021-06-1038-738/+774
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| | * | | [disabled checker] BTL Scheduling and Renumbering OK!Léo Gourdin2021-05-271-0/+1
| | * | | Moving common tools, adding liveness input/output information to BTL generati...Léo Gourdin2021-05-243-2/+39
| | * | | Changing to an opaq record in BTL info, this is a broken commitLéo Gourdin2021-05-201-0/+52
| | * | | Grouping common RTL functions, printer improvementLéo Gourdin2021-05-192-5/+2
* | | | | Merge remote-tracking branch 'origin/parameterized-cse3' into kvx-workDavid Monniaux2021-09-014-61/+79
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| * | | | more parameterizationDavid Monniaux2021-07-161-2/+0
| * | | | make operations cse3 parametricDavid Monniaux2021-07-162-6/+10
| * | | | make trivial ops parametricDavid Monniaux2021-07-162-6/+7
| * | | | make conditions a parameter in CSE3David Monniaux2021-07-162-3/+12
| * | | | rename parameterized versionsDavid Monniaux2021-07-162-38/+38
| * | | | make CSE3 condition parametricDavid Monniaux2021-07-162-29/+42
| * | | | rm condition parametrization in CSE3analysisDavid Monniaux2021-07-162-13/+6
* | | | | RTLTunneling: fix comments and authors informationSylvain Boulmé2021-08-245-89/+24
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* | | | remove default_notrap_load_valueSylvain Boulmé2021-07-241-1/+1
* | | | Merge branch 'kvx-work' into rtl-tunnelingSylvain Boulmé2021-07-2413-25/+18
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| * | | Replacing default notrap load value by Vundef everywherecsix-PhDCyril SIX2021-06-1813-25/+18
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* | | Change "Tunneling" to "LTLTunneling" everywherePierre Goutagny2021-06-175-5/+5
* | | Use Tunnelinglibs in TunnelingauxPierre Goutagny2021-06-171-256/+81
* | | Simplify tunneling factorisationPierre Goutagny2021-06-172-168/+173
* | | Use Tunnelinglibs in RTLTunnelingauxPierre Goutagny2021-06-162-265/+123
* | | Add Tunneling factorisation modulePierre Goutagny2021-06-161-0/+237
* | | Add RTL Tunneling as a passPierre Goutagny2021-06-142-0/+6
* | | Add the RTLTunneling oraclePierre Goutagny2021-06-141-0/+284
* | | Complete RTLTunnelingproofPierre Goutagny2021-06-111-16/+66
* | | Complete `tunnel_step_correct` proof up to IjumptablePierre Goutagny2021-06-101-9/+227
* | | Starts proof for `tunnel_step_correct`Pierre Goutagny2021-06-091-15/+120
* | | Monday's work on RTLTunnelingproofPierre Goutagny2021-06-071-31/+153
* | | Add RTLTunnelingproof.vPierre Goutagny2021-06-041-0/+170
* | | Fix check_instr Icond target conditionsPierre Goutagny2021-06-041-2/+2
* | | Write RTLTunneling.vPierre Goutagny2021-06-031-0/+125
* | | Add RTLTunneling.vPierre Goutagny2021-06-031-0/+0
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* | Merge remote-tracking branch 'verimag/manuscript' into kvx-workCyril SIX2021-06-011-13/+11
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| * | Do not rotate if the CB was already at the end.Cyril SIX2021-04-281-1/+5
| * | Heuristic counter updateCyril SIX2021-04-281-12/+6
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* | Merge remote-tracking branch 'origin/kvx-work' into merge_master_8.13.1Cyril SIX2021-06-014-545/+286
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| * Merge remote-tracking branch 'origin/manuscript' into kvx-worksubmission_OOPSLA2021_AARCH64_KVXCyril SIX2021-04-133-511/+129
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| | * CleaningCyril SIX2021-04-021-2/+1
| | * More efficientCyril SIX2021-04-021-8/+12
| | * Outermost loop detection worksCyril SIX2021-04-021-9/+10
| | * Getting all loop bodiesCyril SIX2021-04-021-2/+36
| | * get_loop_headers simplification (using the new get_loop_backedges)Cyril SIX2021-04-021-39/+7
| | * Simple backedge detection (modified code from get_loop_headers)Cyril SIX2021-04-022-0/+43
| | * Big simplification of get_loop_infoCyril SIX2021-03-311-111/+16
| | * Simplification of the Linearize heuristic (same result functionally)Cyril SIX2021-03-301-216/+6
| | * Simplifications on Linearize - details belowCyril SIX2021-03-291-205/+79
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