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* [BROKEN] Merge with v3.9 : something broken for __builtin_expect in cfrontend...Cyril SIX2021-06-011-0/+2
* Replace `omega` tactic with `lia`Xavier Leroy2020-12-291-1/+1
* PowerPC modeling of registers destroyed by pseudo-instructionsXavier Leroy2020-12-061-1/+1
* Remove Pfcfi, Pfcfiu, Pfctiu pseudoinstructionsXavier Leroy2020-12-061-9/+0
* Model GPR0 in isel (#199)Xavier Leroy2019-09-171-1/+1
* Provide a float select operation for PowerPC. (#173)Bernhard Schommer2019-05-281-0/+8
* Emulate the "isel" instruction on non-EREF PPC processorsXavier Leroy2019-05-201-1/+1
* Give a semantics to the Pisel instructionXavier Leroy2019-05-201-1/+7
* Use 'gpr_or_zero' for base register of indexed load/stores, bug 24776Michael Schmidt2018-10-201-2/+2
* Model external calls as destroying all caller-save registersXavier Leroy2018-06-011-1/+10
* Add new powerpc builtins.Michael Schmidt2018-04-271-0/+4
* Hybrid 64bit/32bit PowerPC portBernhard Schommer2017-05-031-10/+167
* Give explicit scopes to notations a#b and a##b and a#b<-cXavier Leroy2017-02-131-4/+6
* Support for 64-bit architectures: update the PowerPC portXavier Leroy2016-10-011-29/+29
* Introduce register pairs to describe calling conventions more preciselyXavier Leroy2016-05-171-17/+34
* Bug 17752, add rldicr instruction for PowerPCMichael Schmidt2015-12-151-1/+3
* bug 17392: remove trailing whitespace in source filesMichael Schmidt2015-10-141-9/+9
* Use PowerPC 64 bits instructions (when available) for int<->FP conversions.Xavier Leroy2015-09-131-0/+19
* Added builtin for isel.Bernhard Schommer2015-09-081-0/+2
* Added builtins for call frame and return address.Bernhard Schommer2015-09-071-3/+3
* Added builtin for the cmpb instruction.Bernhard Schommer2015-09-071-0/+2
* Added builtin for mbar instruction.Bernhard Schommer2015-09-031-0/+2
* New builtin for dcbz instruction.Bernhard Schommer2015-09-031-8/+10
* Added builtin for the icbtls instruction.Bernhard Schommer2015-09-021-0/+2
* Added builtin for dcbtlsBernhard Schommer2015-09-021-1/+3
* Added the gcc builtin prefetch.Bernhard Schommer2015-09-011-0/+4
* Renaming {BA,BR}_longofwords -> {BA,BR}_splitlong.Xavier Leroy2015-08-221-1/+1
* Adapt the PowerPC port to the new builtin representation.Xavier Leroy2015-08-211-26/+23
* Added builtin for the dcbf instructionBernhard Schommer2015-08-171-0/+2
* Added builtin for the dcbi instruction.Bernhard Schommer2015-08-171-4/+4
* Added builitin for the icbi instruction.Bernhard Schommer2015-08-141-0/+2
* Added builtin for the lwsync barrier.Bernhard Schommer2015-08-141-0/+2
* Corrected little typo in __builtin_clz function.Bernhard Schommer2015-07-061-2/+2
* Changed a minor typo: Pstwxu should be PstwuxBernhard Schommer2015-06-221-2/+2
* Updating the PowerPC and ARM ports.Xavier Leroy2015-03-271-35/+7
* Add builtins for load with reservation and conditional store.xleroy2014-08-201-0/+4
* powerpc/Asm: simplify the modeling of Csymbol_low and Csymbol_high.xleroy2014-08-181-18/+8
* PowerPC port: refactored the expansion of built-in functions andxleroy2014-07-281-14/+85
* Merge of "newspilling" branch:xleroy2014-07-231-9/+51
* Refactoring: move symbol_offset into Genv.xleroy2014-05-241-16/+10
* - Back to origins: suppress Mfloat64al32 chunk and align Mfloat64 to 4.xleroy2014-01-121-4/+4
* Future-proofing: keep signature information in IA32 and PowerPC Asm, just lik...xleroy2013-12-261-27/+26
* powerpc/: new unary operation "addsymbol"xleroy2013-11-171-1/+9
* Optimize integer divisions by positive constants, turning them intoxleroy2013-07-291-0/+6
* Merge of the "princeton" branch:xleroy2013-06-161-1/+1
* Refactoring: move definition of chunk_of_type to AST.v.xleroy2013-05-061-3/+0
* Big merge of the newregalloc-int64 branch. Lots of changes in two directions:xleroy2013-04-201-41/+38
* Revised Stacking and Asmgen passes and Mach semantics: xleroy2013-03-011-124/+139
* - Revised non-overflow constraints on memory injections so that xleroy2012-07-231-5/+5
* PowerPC: remove the fmadd and fmsub operators/Asm instructionsxleroy2012-03-071-6/+0
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