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* [BROKEN] Merge with v3.9 : something broken for __builtin_expect in cfrontend...Cyril SIX2021-06-015-16/+24
* replacing omega with lia in some fileLéo Gourdin2021-03-292-9/+9
* fix riscv merge?Léo Gourdin2021-03-295-488/+0
* Merge branch 'master' into merge_master_8.13.1Sylvain Boulmé2021-03-2311-177/+761
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| * Introduce and use PrintAsmaux.variable_sectionXavier Leroy2021-02-231-2/+2
| * Qualify `Hint` as `Global Hint` where appropriateXavier Leroy2021-01-211-1/+1
| * Support re-normalization of function parameters at function entryXavier Leroy2021-01-161-1/+2
| * RISC-V: fix FP calling conventionsXavier Leroy2021-01-144-117/+171
| * RISC-V: wrong fixup code generated for vararg calls with fixed FP argsXavier Leroy2021-01-101-12/+18
| * Replace `omega` tactic with `lia`Xavier Leroy2020-12-299-76/+76
| * RISC-V: revised calling conventions for variadic functionsXavier Leroy2020-12-252-63/+105
| * Changed cc_varargs to an option typeBernhard Schommer2020-12-252-4/+5
* | Merge conflicts solved and cleaning in Asmgenproof after expansionLéo Gourdin2021-03-024-1148/+106
* | Merge remote-tracking branch 'origin/riscV-cmov' into riscv-workLéo Gourdin2021-03-0214-19/+624
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| * | Adding missing operators in PrintOp for debuggingLéo Gourdin2021-02-251-0/+5
| * | écrase X31riscV-cmovDavid Monniaux2021-02-031-1/+2
| * | Merge remote-tracking branch 'origin/kvx-work' into riscV-cmovDavid Monniaux2021-02-031-1/+1
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| * | | detect redundant cmovDavid Monniaux2021-02-022-3/+34
| * | | fix code generation for select(b, r, r)David Monniaux2021-02-021-2/+7
| * | | fix problem if rt = rfDavid Monniaux2021-02-021-6/+8
| * | | Cmov TsingleDavid Monniaux2021-02-023-33/+43
| * | | implement for another register configurationDavid Monniaux2021-02-021-1/+8
| * | | some more cases implementedDavid Monniaux2021-02-021-12/+25
| * | | PselectdDavid Monniaux2021-02-023-0/+33
| * | | cmov on integersDavid Monniaux2021-02-022-11/+88
| * | | begin synthesizing selectDavid Monniaux2021-02-023-2/+34
| * | | asmgen OselectlDavid Monniaux2021-02-022-0/+11
| * | | begin implementing selectDavid Monniaux2021-02-027-6/+113
| * | | select01_longDavid Monniaux2021-02-011-130/+10
| * | | repr etc.David Monniaux2021-02-011-4/+2
| * | | bitwise_select_value_correctDavid Monniaux2021-02-011-0/+12
| * | | int64_of_value some moreDavid Monniaux2021-02-011-14/+15
| * | | int64_of_valueDavid Monniaux2021-02-011-0/+77
| * | | Asmgen for bits / floatDavid Monniaux2021-02-011-0/+13
| * | | bits to floatDavid Monniaux2021-02-019-5/+82
| * | | adding builtinsDavid Monniaux2021-02-014-6/+27
| * | | Obits_of_single etcDavid Monniaux2021-02-013-3/+46
| * | | define some semantics in AsmDavid Monniaux2021-02-012-3/+24
| * | | select_longDavid Monniaux2021-01-301-0/+38
| * | | select through bitwise operationsDavid Monniaux2021-01-301-0/+40
* | | | Try to save values in virtual registers during expansionLéo Gourdin2021-03-012-94/+117
* | | | Proofs finished for expansionLéo Gourdin2021-03-012-19/+62
* | | | Debugging fake values finishedLéo Gourdin2021-03-012-14/+20
* | | | some bugfixLéo Gourdin2021-03-012-15/+20
* | | | Proof of fsval condition cmp okLéo Gourdin2021-03-018-170/+527
* | | | [Admitted checker] Some more proof, version with buggy addirw0Léo Gourdin2021-02-251-5/+126
* | | | some more proof for fake hsval checker expansionsLéo Gourdin2021-02-252-46/+771
* | | | [Intermediate] Adding fake hsval for Ccomp expansionLéo Gourdin2021-02-232-7/+112
* | | | Merge remote-tracking branch 'origin/riscv-work-rules' into riscv-workLéo Gourdin2021-02-231-0/+19
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| * | | | Separate target_op_simplify for riscVLéo Gourdin2021-02-231-0/+19
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