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| author | Clifford Wolf <clifford@clifford.at> | 2016-06-07 17:05:02 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-06-07 17:05:02 +0200 |
| commit | bf062e39acf817c00da0c21ae7200d618167218a (patch) | |
| tree | f40f49665153b54de34aacc39afff13632a6b556 /README.md | |
| parent | f4bb91b060211884fc0b85479fb6becf20daeb1f (diff) | |
| download | picorv32-bf062e39acf817c00da0c21ae7200d618167218a.tar.gz picorv32-bf062e39acf817c00da0c21ae7200d618167218a.zip | |
Added STACKADDR parameter
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 8 |
1 files changed, 8 insertions, 0 deletions
@@ -279,6 +279,14 @@ The start address of the program. The start address of the interrupt handler. +#### STACKADDR (default = 32'h ffff_ffff) + +When this parameter has a value different from 0xffffffff, then register `x2` (the +stack pointer) is initialized to this value on reset. (All other registers remain +uninitialized.) Note that the RISC-V calling convention requires the stack pointer +to be aligned on 16 bytes boundaries (4 bytes for the RV32I soft float calling +convention). + Cycles per Instruction Performance ---------------------------------- |