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BranchCommit messageAuthorAge
dev/schedulingStart working on supporting different back endsYann Herklotz2 years
masterFix some of the testing in MakefileYann Herklotz3 years
dev-michalisFix renamer skipping ram_memMichalis Pardalos3 years
oopsla21Use main instead of top for synthesising Vericert designsYann Herklotz3 years
dev/divAdd the dividerYann Herklotz3 years
exp/inl-cse-constSwitch CSE and const-propYann Herklotz3 years
dev/ioAdd predicate semantics to abstractYann Herklotz3 years
dev/dividerGet some Verilog output with dividersYann Herklotz3 years
dev/cond-const-propAdd parallel blockYann Herklotz3 years
michalis-mergeMerge branch 'master' into michalis-mergeYann Herklotz3 years
[...]
 
TagDownloadAuthorAge
v1.2.2vericert-kvx-1.2.2.tar.gz  vericert-kvx-1.2.2.zip  Yann Herklotz3 years
v1.2.1vericert-kvx-1.2.1.tar.gz  vericert-kvx-1.2.1.zip  Yann Herklotz3 years
v1.2.0vericert-kvx-1.2.0.tar.gz  vericert-kvx-1.2.0.zip  Yann Herklotz3 years
v1.1.0vericert-kvx-1.1.0.tar.gz  vericert-kvx-1.1.0.zip  Yann Herklotz3 years
v1.0.1vericert-kvx-1.0.1.tar.gz  vericert-kvx-1.0.1.zip  Yann Herklotz4 years
v1.0.0vericert-kvx-1.0.0.tar.gz  vericert-kvx-1.0.0.zip  Yann Herklotz4 years
v0.1.0vericert-kvx-0.1.0.tar.gz  vericert-kvx-0.1.0.zip  Yann Herklotz4 years
 
AgeCommit messageAuthorFilesLines
2021-02-21Add parallel blockdev/cond-const-propYann Herklotz1-1/+2
2021-02-21Fix printing of the final cycle countYann Herklotz1-2/+15
2021-02-19Fix bug in scheduleYann Herklotz1-2/+1
2021-02-18Fix schedule for nowYann Herklotz1-1/+2
2021-02-17Add udiv and sdiv to constraintsYann Herklotz1-12/+20
2021-02-17Remove dead code and add more constraintsYann Herklotz1-107/+16
2021-02-16Add option to turn off if-conversionYann Herklotz7-6/+33
2021-02-16Merge branch 'master' into developYann Herklotz5-12/+623
2021-02-16Remove the documentation stagesYann Herklotz1-8/+0
2021-02-16Pin nixpkgsYann Herklotz1-2/+1
[...]
 
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