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| author | Yann Herklotz <git@yannherklotz.com> | 2020-04-17 14:56:46 +0100 |
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| committer | Yann Herklotz <git@yannherklotz.com> | 2020-04-17 14:56:46 +0100 |
| commit | 8eab4b3fb7fccf3b93711b0ef7c9779926bcf252 (patch) | |
| tree | e68c4d61f9739606588ba46df65b13a4750dafa7 /src/verilog/PrintVerilog.mli | |
| parent | d5f734deffeb4673e4a5398c3df35eecc569df64 (diff) | |
| download | vericert-kvx-8eab4b3fb7fccf3b93711b0ef7c9779926bcf252.tar.gz vericert-kvx-8eab4b3fb7fccf3b93711b0ef7c9779926bcf252.zip | |
Fix printing with new Verilog AST
Diffstat (limited to 'src/verilog/PrintVerilog.mli')
| -rw-r--r-- | src/verilog/PrintVerilog.mli | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/verilog/PrintVerilog.mli b/src/verilog/PrintVerilog.mli index 181a9d2..b4d2937 100644 --- a/src/verilog/PrintVerilog.mli +++ b/src/verilog/PrintVerilog.mli @@ -17,3 +17,5 @@ *) val print_program : out_channel -> Verilog.coq_module -> unit + +val print_result : (BinNums.positive * Value.value) list -> unit |