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authorYann Herklotz <ymherklotz@gmail.com>2019-01-23 19:36:11 +0000
committerYann Herklotz <ymherklotz@gmail.com>2019-01-23 19:36:11 +0000
commit12100f95c1d0560b8dd8cd0408a2c4837e9cdde6 (patch)
treecdb987e15807e5d831396a8f4ee663205573ea11 /src
parentfe0f44b2f1609bb8d5097a85daec51e5f9ffdaf0 (diff)
downloadverismith-12100f95c1d0560b8dd8cd0408a2c4837e9cdde6.tar.gz
verismith-12100f95c1d0560b8dd8cd0408a2c4837e9cdde6.zip
Add better echo
Diffstat (limited to 'src')
-rw-r--r--src/VeriFuzz/Simulator/General.hs19
1 files changed, 14 insertions, 5 deletions
diff --git a/src/VeriFuzz/Simulator/General.hs b/src/VeriFuzz/Simulator/General.hs
index 543c139..dbd1da0 100644
--- a/src/VeriFuzz/Simulator/General.hs
+++ b/src/VeriFuzz/Simulator/General.hs
@@ -12,12 +12,14 @@ Class of the simulator and the synthesize tool.
module VeriFuzz.Simulator.General where
-import Data.Bits (shiftL)
-import Data.ByteString (ByteString)
-import qualified Data.ByteString as B
-import Data.Text (Text)
-import Prelude hiding (FilePath)
+import Data.Bits (shiftL)
+import Data.ByteString (ByteString)
+import qualified Data.ByteString as B
+import Data.Text (Text)
+import qualified Data.Text as T
+import Prelude hiding (FilePath)
import Shelly
+import System.FilePath.Posix (takeBaseName)
import VeriFuzz.Verilog.AST
-- | Simulator class.
@@ -59,3 +61,10 @@ bsToI = B.foldl' (\i b -> (i `shiftL` 8) + fromIntegral b) 0
noPrint :: Sh a -> Sh a
noPrint =
print_stdout False . print_stderr False
+
+echoP :: Text -> Sh ()
+echoP t = do
+ fn <- pwd
+ echo $ bname fn <> " :: " <> t
+ where
+ bname = T.pack . takeBaseName . T.unpack . toTextIgnore