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| author | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-01 15:24:57 +0100 |
|---|---|---|
| committer | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-01 15:24:57 +0100 |
| commit | 9db10c8914159106bc3da2efba87d74439b77361 (patch) | |
| tree | b3383853de011b30a5e9e0784bd1efa783e6a37f /src | |
| parent | 1b223cb1afc692468c0956796944b582dd2c4751 (diff) | |
| download | verismith-9db10c8914159106bc3da2efba87d74439b77361.tar.gz verismith-9db10c8914159106bc3da2efba87d74439b77361.zip | |
Add helper function to turn port into expr
Diffstat (limited to 'src')
| -rw-r--r-- | src/Test/VeriFuzz/Verilog/Helpers.hs | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/Test/VeriFuzz/Verilog/Helpers.hs b/src/Test/VeriFuzz/Verilog/Helpers.hs index b04aa76..20c3b0d 100644 --- a/src/Test/VeriFuzz/Verilog/Helpers.hs +++ b/src/Test/VeriFuzz/Verilog/Helpers.hs @@ -70,3 +70,6 @@ addTestBench = addDescription $ Description testBench defaultPort :: Identifier -> Port defaultPort = Port Wire 1 + +portToExpr :: Port -> Expr +portToExpr (Port _ _ id) = Id id |