aboutsummaryrefslogtreecommitdiffstats
path: root/src/Verismith/Verilog/CodeGen.hs
Commit message (Collapse)AuthorAgeFilesLines
* Add paranthesisYann Herklotz2021-07-231-1/+1
|
* Add changes to Icarus for fuzzingYann Herklotz2021-07-141-2/+2
|
* Add formal properties to ASTYann Herklotz2021-05-191-0/+6
|
* Fix parser for a larger set of inputsYann Herklotz2021-04-261-1/+2
| | | | | | | | - Added support for parameter parsing - Added support for parameter declaration for instantiations - Fix parsing of @(*) - Fix parsing of `timescale - Add parsing for case statements with default
* Format with ormoluYann Herklotz2020-05-121-158/+170
|
* Fix types with annotationsYann Herklotz2020-05-111-12/+15
|
* WIP changes to the AST typesYann Herklotz2020-03-161-15/+15
|
* Fix spacing in the generated VerilogYann Herklotz2020-03-031-16/+20
|
* Add case statement to the ASTYann Herklotz2020-03-031-1/+10
|
* Update license noticesYann Herklotz2020-01-061-1/+1
|
* Update license to dual license GPLv3Yann Herklotz2020-01-061-1/+1
|
* Add comment to code generationYann Herklotz2019-10-251-1/+1
|
* Rename main modulesYann Herklotz2019-09-181-0/+341