| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | 5_bit_adder.ipinfo | 162 | logstatsplain |
| d--------- | db | 3110 | logstatsplain |
| -rw-r--r-- | full_adder.bdf | 10684 | logstatsplain |
| -rw-r--r-- | full_adder.bsf | 2106 | logstatsplain |
| -rw-r--r-- | full_adder.qpf | 1252 | logstatsplain |
| -rw-r--r-- | full_adder.qsf | 2544 | logstatsplain |
| -rw-r--r-- | full_adder.qws | 953 | logstatsplain |
| d--------- | incremental_db | 80 | logstatsplain |
| d--------- | output_files | 643 | logstatsplain |
| d--------- | simulation / modelsim | 35 | logstatsplain |
| -rw-r--r-- | ten_bit_adder.ipinfo | 162 | logstatsplain |
| -rw-r--r-- | ten_bit_adder_NO_BUS.ipinfo | 162 | logstatsplain |
 |
index : FPGA-2015 | |
| A collection of Quartus projects to learn FPGA design. |
| aboutsummaryrefslogtreecommitdiffstats |