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author | zedarider <ymherklotz@gmail.com> | 2016-12-12 13:19:22 +0000 |
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committer | zedarider <ymherklotz@gmail.com> | 2016-12-12 13:19:22 +0000 |
commit | aee06a47eca6d7f5532a10e59e394fd33904670a (patch) | |
tree | 9abf1adeec021a72863f1bfc8e1270513b26f1cb /part_3/ex14/db/ex10_partition_pins.json | |
parent | c2618f0b8ff2ed70d1e830b612b9ecfe722ece5f (diff) | |
download | VerilogCoursework-aee06a47eca6d7f5532a10e59e394fd33904670a.tar.gz VerilogCoursework-aee06a47eca6d7f5532a10e59e394fd33904670a.zip |
adding full files to github, with all updates
Diffstat (limited to 'part_3/ex14/db/ex10_partition_pins.json')
-rwxr-xr-x | part_3/ex14/db/ex10_partition_pins.json | 209 |
1 files changed, 209 insertions, 0 deletions
diff --git a/part_3/ex14/db/ex10_partition_pins.json b/part_3/ex14/db/ex10_partition_pins.json new file mode 100755 index 0000000..93dd4f8 --- /dev/null +++ b/part_3/ex14/db/ex10_partition_pins.json @@ -0,0 +1,209 @@ +{
+ "partitions" : [
+ {
+ "name" : "Top",
+ "pins" : [
+ {
+ "name" : "DAC_CS",
+ "strict" : false
+ },
+ {
+ "name" : "DAC_SDI",
+ "strict" : false
+ },
+ {
+ "name" : "DAC_LD",
+ "strict" : false
+ },
+ {
+ "name" : "DAC_SCK",
+ "strict" : false
+ },
+ {
+ "name" : "PWM_OUT",
+ "strict" : false
+ },
+ {
+ "name" : "HEX0[0]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX0[1]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX0[2]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX0[3]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX0[4]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX0[5]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX0[6]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX1[0]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX1[1]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX1[2]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX1[3]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX1[4]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX1[5]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX1[6]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX2[0]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX2[1]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX2[2]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX2[3]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX2[4]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX2[5]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX2[6]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX3[0]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX3[1]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX3[2]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX3[3]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX3[4]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX3[5]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX3[6]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX4[0]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX4[2]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX4[3]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX4[4]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX4[5]",
+ "strict" : false
+ },
+ {
+ "name" : "HEX4[6]",
+ "strict" : false
+ },
+ {
+ "name" : "CLOCK_50",
+ "strict" : false
+ },
+ {
+ "name" : "SW[2]",
+ "strict" : false
+ },
+ {
+ "name" : "SW[1]",
+ "strict" : false
+ },
+ {
+ "name" : "SW[0]",
+ "strict" : false
+ },
+ {
+ "name" : "SW[6]",
+ "strict" : false
+ },
+ {
+ "name" : "SW[3]",
+ "strict" : false
+ },
+ {
+ "name" : "SW[7]",
+ "strict" : false
+ },
+ {
+ "name" : "SW[8]",
+ "strict" : false
+ },
+ {
+ "name" : "SW[9]",
+ "strict" : false
+ },
+ {
+ "name" : "SW[5]",
+ "strict" : false
+ },
+ {
+ "name" : "SW[4]",
+ "strict" : false
+ }
+ ]
+ }
+ ]
+}
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