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+# Reading C:/altera/13.0sp1/modelsim_ase/tcl/vsim/pref.tcl
+# do ex10_run_msim_rtl_verilog.do
+# if {[file exists rtl_work]} {
+# vdel -lib rtl_work -all
+# }
+# vlib rtl_work
+# vmap work rtl_work
+# Copying C:\altera\13.0sp1\modelsim_ase\win32aloem/../modelsim.ini to modelsim.ini
+# Modifying modelsim.ini
+# ** Warning: Copied C:\altera\13.0sp1\modelsim_ase\win32aloem/../modelsim.ini to modelsim.ini.
+# Updated modelsim.ini.
+#
+# vlog -vlog01compat -work work +incdir+C:/New\ folder/ex10/verilog_files {C:/New folder/ex10/verilog_files/spi2dac.v}
+# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov 2 2012
+# -- Compiling module spi2dac
+#
+# Top level modules:
+# spi2dac
+#
+# Load canceled