| Mode | Name | Size | |
|---|---|---|---|
| d--------- | HelloWorld | 80 | logstatsplain |
| -rw-r--r-- | README.md | 83 | logstatsplain |
| d--------- | RowDetect | 40 | logstatsplain |
| d--------- | TestVerilog | 442 | logstatsplain |
| d--------- | bus_d_ff | 349 | logstatsplain |
| d--------- | column_ chooser | 337 | logstatsplain |
| -rw-r--r-- | column_chooser.v | 4437 | logstatsplain |
| -rw-r--r-- | magson.v | 204 | logstatsplain |
| -rw-r--r-- | pitch_volume_out.v | 940 | logstatsplain |
| -rw-r--r-- | special_note_mux.v | 2660 | logstatsplain |
| -rw-r--r-- | ten_dff.v | 211 | logstatsplain |
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index : verilog | |
| Repository with some Verilog designs used to learn Verilog simulation. |
| aboutsummaryrefslogtreecommitdiffstats |