aboutsummaryrefslogtreecommitdiffstats
path: root/dhrystone
Commit message (Expand)AuthorAgeFilesLines
* Fix dhrystoneMiodrag Milanovic2021-12-272-1/+6
* Cleanup whitespacesLarry Doolittle2020-04-231-1/+1
* Add tracing support to dhrystone testTom Verbeure2019-08-182-2/+28
* Fix miscellaneous typos in documentationLarry Doolittle2018-04-171-1/+1
* Update riscv-gnu-toolchain to 1b80cbeClifford Wolf2018-04-031-30/+30
* Add missing "volatile" to "asm" statementsClifford Wolf2017-10-301-3/+3
* Remove some trailing whitespaceLarry Doolittle2017-06-131-1/+1
* Added riscv.ld linker script (static entry point at 0x10000)Clifford Wolf2017-01-131-1/+1
* Some build fixes for new riscv-gnu-toolchainClifford Wolf2016-12-171-1/+1
* Renamed testbench_slow_mem to testbench_nola (no look ahead)Clifford Wolf2016-09-042-7/+9
* Cleanups in dhrystone/testbench_slow_mem.v, added results to READMEClifford Wolf2016-09-041-24/+3
* Fix tabsTom Verbeure2016-09-031-29/+29
* testbench_slow_memTom Verbeure2016-09-022-1/+122
* Using fast mul in dhrystone benchmarkClifford Wolf2016-08-301-1/+0
* Dhrystone: Add toolchain prefix to objcopyTom Verbeure2016-08-302-1/+2
* Using newlib libc from riscv-tools in dhrystone benchmarkClifford Wolf2016-06-076-227/+262
* RISC-V ISA 2.1 now calls "sbreak" officially "ebreak"Clifford Wolf2016-06-062-3/+3
* Using .vvp instead of .exe for iverilog executablesClifford Wolf2016-05-041-11/+11
* Improvements in dhrystone "make timing"Clifford Wolf2016-04-142-4/+7
* Fixed "make timing" in dhrystone/Clifford Wolf2016-04-131-2/+3
* Added BARREL_SHIFTER config parameterClifford Wolf2016-04-121-0/+1
* Updates dhrystone resultsClifford Wolf2016-04-102-4/+7
* Using riscv32-unknown-elf- toolchainClifford Wolf2015-11-031-4/+7
* dhrystone: copy&paste newlib code for memcpy() and strcpy()Clifford Wolf2015-10-301-225/+189
* Improved firmware for vivado "system" exampleClifford Wolf2015-07-161-1/+1
* Removed trailing whitespaces in dhrystone codeClifford Wolf2015-07-024-61/+61
* More README stuffClifford Wolf2015-06-281-0/+1
* Refactored instruction decoderClifford Wolf2015-06-081-2/+1
* Added look-ahead write interfaceClifford Wolf2015-06-071-19/+26
* Major redesign of main FSMClifford Wolf2015-06-073-6/+23
* Using libc assembler code in dhrystone stdlib.cClifford Wolf2015-06-074-2/+604
* Added insn timing hack to dryhstone testbenchClifford Wolf2015-06-061-1/+15
* Added memory "look-ahead" read interfaceClifford Wolf2015-06-061-12/+16
* Faster memory model in dhrystone testbenchClifford Wolf2015-06-061-18/+18
* Initial importClifford Wolf2015-06-067-0/+1310